Government of the United States of America, As Represented by the Secretary of Commerce

University System of Maryland

Mark David Stiles

Advait Madhavan

Matthew William Daniels

Gina Cristina Adam

Brian Douglas Hoskins

Systems and methods are provided herein that implement and utilize temporal state machines and other temporal computational/memory circuits. For example, a temporal state machine is provided that comprises a temporal computational unit comprising at least one circuit to perform a time-domain operation, and a temporal memory unit. Both the temporal computational unit and temporal memory unit can operate using solely, or partially, time-encoded wavefronts. The computation unit accesses time-encoded wavefronts from the memory and can output and write time-encoded wavefronts back to the memory.

Timing-based computer architecture systems and methods

A quasi-systolic array includes: a primary quasi-systolic processor; an edge row bank and edge column bank of edge quasi-systolic processors; and an interior bank of interior quasi-systolic processors. The primary quasi-systolic processor, edge quasi-systolic processor, and interior quasi-systolic processor independently include a quasi-systolic processor and are disposed and electrically connected in rows and columns in the quasi-systolic array.

Growing community of inventors

Silver Spring, MD, United States of America

Mark David Stiles