Western Digital Technologies, Inc.

Mark David Erickson

Darin Edward Gerhart

Nicholas Edward Ortmeier

Adam Christopher Geml

Yasunobu Suginaka

A method and apparatus that provides a solid state drive that analyzes connection performance during I/O operations and is configured to independently modify connection performance based upon user specified input parameters without the need for host computer management.

Intelligent SAS phy connection management

A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.

Method using logical based addressing for latency reduction

The present disclosure generally relates to a method for intelligent device initiated SAS Phy PM. Using device internal phy characteristics and future phy usage queue, the device determines optimal SAS Phy PM usage based on a predetermined configuration preference of power versus performance. The device achieves optimal SAS Phy PM Usage by implementing a state machine to manage phy PM states and transitions between the PM states. The device state machine includes capabilities to proactively initiate transitions to partial or slumber PM states, start early wake-up from partial or slumber PM states to mask the associated latency impacts of exiting partial or slumber PM states, and selectively reject host requests to enter a partial or slumber PM state.

Intelligent SAS phy power management

A method includes receiving, by a hardware controller of a storage device and from a host device, a command to read data from or write data to a non-volatile memory device of the storage device. The method includes, responsive to receiving the command: initializing, by firmware executing at a processor of the hardware controller, a command to retrieve data from or write data to the non-volatile memory device; determining, by circuit logic of the hardware controller, a time indicative of when the firmware initialized the command; determining, by the circuit logic, a time indicative of when the command terminated; and storing, by the circuit logic and at a latency monitoring cache of the storage device, a timestamp associated with the time indicative of when the command was initialized and a timestamp associated with the time indicative of when the command terminated.

Automated latency monitoring

A method is described that includes generating, by a controller of a storage device, operating statistics associated with an operating state of the storage device. The method includes receiving, by the controller and from a host device, a non-interrupt command frame that requests transfer of data blocks between the storage device and the host device. The method further includes, in response to receiving the non-interrupt command frame, generating, by the controller, a response frame associated with the non-interrupt command frame, wherein the response frame includes the operating statistics. The method includes transmitting, by the controller and to the host device, the response frame.

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Mantorville, MN, United States of America

Mark David Erickson