Analog Devices,inc.

Mark D Reisiger

Arthur Joseph Kalb

Jie Zhou

Apparatus and methods for chopper amplifiers are provided herein. In certain configurations, a chopper amplifier includes at least one differential transistor bank including a selection circuit and a plurality of transistors. The selection circuit can select a first portion of the transistors for operation in a first transistor group and a second portion of the transistors for operation in a second transistor group. During calibration, the chopper amplifier's input offset can be observed for different transistor configurations of the differential transistor banks. Although the transistors of a particular bank can be designed to have about the same drive-strength and/or geometry, the chopper amplifier can have a different input offset in different transistor configurations due to manufacturing mismatch between transistors, such as process variation. The chopper amplifier can be programmed to operate with the selected transistor configurations of the differential transistor banks to provide the amplifier with low input offset.

Apparatus and methods for chopper amplifiers

An integrated circuit device comprises a common-gated dual-oxide MOSFET including a protective device and a MOSFET. A common gate electrode serves as a gate electrode of the protective device and as a gate of the MOSFET. The protective device comprises a first gate dielectric having a first thickness over a first channel region and the MOSFET comprises a second gate dielectric thicker than the first gate dielectric over a second channel region. During a plasma process, a first current can flow through the first dielectric that is higher than a second current through the second dielectric.

Integrated circuit structure and method for protection from damage to gate dielectric

Apparatus and methods for amplifier power supply control are provided. In certain implementations, an amplifier includes an input amplification stage and a power supply control block for generating a power high supply and a power low supply for the input amplification stage. The power supply control block receives a reference signal indicative of a common-mode input voltage of the amplifier, and the power supply control block adjusts a voltage level of the power high and power low supplies while maintaining a substantially constant voltage difference between the power high and power low supplies. The power supply control block changes the voltage level of the power high and power low supplies based on the reference signal such that the voltage levels of the power high and power low supplies move in relation to the common-mode input voltage.

Apparatus and methods for amplifier power supply control

Apparatus and methods for electronic amplification are provided. In one embodiment, a method amplifying a differential input voltage signal using a first NMOS transistor and a second NMOS transistor is provided. The method includes controlling a drain-source voltage of the first NMOS transistor using a first high voltage NMOS transistor and a first high voltage PMOS transistor. The first high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the first NMOS transistor. The method further includes controlling a drain-source voltage of the second NMOS transistor using a second high voltage NMOS transistor and a second high voltage PMOS transistor. The second high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the second NMOS transistor.

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San Jose, CA, United States of America

Mark D Reisiger