Bae Systems Information and Electronic Systems Integration Inc.

Other

Purdue Research Foundation

Mark D Hickle

Mark E Stuenkel

William E Hickle

Paul D Zemany

Dimitrios Peroulis

Lawrence J Kushner

Joseph D Cali

Jack Chuang

Eric J Naglich

Thomas J Johnson

Curtis M Grens

Michael Dimitri Sinanis

Souleymane Gnanou

Robert W Sepanek

Techniques are provided for a broadband microwave/millimeter-wave balanced-to-unbalanced transformer (balun). A balun implementing the techniques according to an embodiment includes a first impedance matching network configured to reduce insertion and return losses of a single-ended signal at a first port of the balun. The balun also includes a first planar bifilar coupled transmission line coupled to the first impedance matching network and configured to transform the single-ended signal into a differential signal. The balun further includes a second planar bifilar coupled transmission line coupled to the first bifilar coupled transmission line and configured to compensate for amplitude and phase imbalance induced on the differential signal by the first bifilar coupled transmission line. The balun further includes a second impedance matching network coupled to both planar bifilar coupled transmission lines and configured to reduce insertion and return losses of the differential signal at second and third ports of the balun.

Broadband microwave and millimeter-wave balanced-to-unbalanced transformer

Techniques are provided for decorrelation of intermodulation products in mixer circuits. A circuit implementing the techniques according to an embodiment includes four switches. Each of the switches comprise a complementary pair of n-channel and p-channel metal oxide semiconductor (NMOS/PMOS) field effect transistors (FETs). The NMOS/PMOS FETs include a source port, a drain port, and a gate port. The gate port is configured to receive an oscillator signal. The circuit also includes electrical conductors to couple the four switches into a double-balanced passive ring configuration to generate an output signal as a mix of an input signal and the oscillator signal. The output signal includes a third order intermodulation (IM3) product. The circuit further includes a voltage bias generator to generate a bias voltage to bias the input signal and the output signal. The magnitude and phase of the IM3 product are determined, at least in part, by the bias voltage.

Decorrelation of intermodulation products in mixer circuits

A radio frequency (RF) filter includes a signal conditioning circuit and a bandstop filter. The signal conditioning circuit receives a broadband RF signal that includes both a jamming signal at a jamming frequency and a signal of interest and generates a plurality of clock signals. Each of the plurality of clock signals has a substantially same frequency as the jamming frequency, but a different phase shift. The bandstop filter receives the RF signal and the plurality of clock signals. The bandstop filter attenuates signals within a bandstop centered at the frequency of the plurality of clock signals. A self-tuning N-path filter is provided.

Self-tuning N-path filter

Techniques are disclosed for self-interference signal cancellation. A hybrid self-interference cancellation (SIC) circuit is configured to be operatively coupled to a transmitter and a receiver, and includes a tunable time domain filter in series with a tunable frequency domain filter. The tunable time domain filter is configured to generate a time-domain multipath cancellation signal based on a first radio signal transmitted by the transmitter at a first frequency while the receiver is receiving a second radio signal at a second frequency. The first and second frequencies can be the same or different and have similar or different power levels at the antennas. The tunable frequency domain filter, which is in series with the tunable time domain filter, is configured to generate a frequency-domain cancellation signal based on the first radio signal while the receiver is receiving the second radio signal.

Self-interference signal cancellation

Techniques are disclosed for phase detection in a phase-locked loop (PLL) control system, such as a millimeter-wave PLL. A PLL control system includes a voltage-controlled oscillator (VCO) circuit and a sub-sampling phase detector (SSPD). The VCO circuit is configured to generate an oscillating VCO output voltage based at least in part on an error signal generated by the SSPD. The error signal is proportional to a phase difference between an oscillating reference input voltage and the oscillating VCO output voltage. The SSPD includes a switched emitter-follower (SEF) sampling network, also referred to in this disclosure as an SEF circuit. In contrast to existing CMOS-based techniques, the SEF sampling network allows the SSPD to operate up to higher frequencies, for example, greater than 100 GHz, than possible using a CMOS sampler, and is also compatible with BiCMOS processes, which generally do not have access to advanced small-geometry CMOS.

Phase detector for phase-locked loops

A signal routing circuit is disclosed which employs resistive combiners to reduce signal jitter. A signal routing circuit configured according to an embodiment comprises an input stage including a plurality of buffer circuits. Each of the buffer circuits is controlled by a selection signal to enable an input signal at an input port of the buffer circuit to generate an output signal at an output port of the buffer circuit. The signal routing circuit also includes a plurality of resistors to couple the output port of each of the buffer circuits of the input stage to a summing junction. The signal routing circuit further includes an output stage including an additional buffer circuit. The input port of the additional buffer circuit is coupled to the summing junction, and the output port of the additional buffer circuit is configured to provide the routed output signal based on the selection signals.

Routing topology for digital signals with resistive combiners for reduced jitter

An evanescent-mode cavity filter with an improved MEMS tuner design is disclosed. The MEMS tuner design allows for the independent control of individual poles in a multi-pole filter, which increases the adaptability of the filter in a crowded RF environment. The filter is further designed to minimize tuning voltages and hysteresis effects. A closed loop control system provides highly responsive tuning of the filter. The closed loop control allows for accurate and stable tuning that compensates for temperature and vibrational effects, while the tuner design enables fast tuning and significantly increases the resolution of the feedback measurement by eliminating charge buildup in the tuner substrate.

Tunable evanescent-mode cavity filter with closed loop control

A mounting apparatus for automatic fire sprinkler systems and other objects to be securely attached to the structure of a ceiling of a building, and additionally relates to a mounting clamp for securely gripping the tee of a suspended ceiling in order to mount an object to be held in proximity to the ceiling and a mounting clamp for mounting the sprinkler head of a fire protection system or other type of water system. The system provides means for more rigidly mounting various components of the system to the existing piping and ceiling structure found at an installation location.

Growing community of inventors

Merrimack, NH, United States of America

Mark D Hickle