Harris Corporation

Mark D Fisher

Stephen S Wilson

David K Vail, Jr

A 'just in time' pipelined signal processing architecture for a phased array antenna simultaneously updates the weights of all phase control elements of the antenna with reduced wiring complexity and fast beam steering updates. Signal propagation paths between a pipelined communication link--through subarray control processors distributed along the pipeline link--and phase control elements of the antenna array are provided with respectively different serial pipelined transport delays. These delays are such that all phase control signals produced by the subarray control processors are applied simultaneously to their associated subsets of antenna phase control elements. The use of serial (FIFO) delays to equalize pipeline and weight processing latency allows each subarray controller to process and forward serial beam vector data at the same data rate at which it is received from an upstream host processor.

Growing community of inventors

West Melbourne, FL, United States of America

Mark D Fisher