Taiwan Semiconductor Manufacturing Comp. Ltd.

Mark Chen

Chan-Hong Chern

King-Yuen Wong

Chun Lin Tsai

Ming-Cheng Lin

Chu Fu Chen

Chun-Lin Tsai

Tysh-Bin Liu

Tysh-Bin Lin

Jui-Cheng Huang

Cheng-Hsiang Hsieh

Tung-Tsun Chen

Chien-Kuo Yang

Ta-Chuan Liao

Semiconductor package structures are provided. An interposer is bonded to a printed circuit board (PCB) or package substrate through first solder bumps disposed on a first side of the interposer. The first solder bumps have a first pitch. A plurality of semiconductor chips are formed, and each of the semiconductor chips is bonded to a second side of the interposer through second solder bumps. The second solder bumps have a second pitch that is less than the first pitch. Each of the semiconductor chips includes a substrate with one or more transistors or integrated circuits formed thereon.

Structures for providing electrical isolation in semiconductor devices

Biosensor devices and methods of forming the same are provided. A cavity is formed in a substrate and is configured to receive one or more charged molecules. A transistor is formed in the substrate and includes a source region, a drain region, and a channel region that are spatially separated from the cavity in a lateral direction. A gate of the transistor is disposed below the cavity and extends between the cavity and the source, drain, and channel regions. A voltage potential of the gate is based on a number of the charged molecules in the cavity.

Biosensor devices and methods of forming the same

Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.

Low static current semiconductor device

Semiconductor package structures and methods of forming the same are provided. An interposer is bonded to a printed circuit board (PCB) or package substrate through first solder bumps disposed on a first side of the interposer. The first solder bumps have a first pitch. A plurality of semiconductor chips are formed, and each of the semiconductor chips is bonded to a second side of the interposer through second solder bumps. The second solder bumps have a second pitch that is less than the first pitch. Each of the semiconductor chips includes a substrate with one or more transistors or integrated circuits formed thereon.

Structures and methods for providing electrical isolation in semiconductor devices

Devices, systems, and methods are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.

Semiconductor structures including isolation regions and methods of forming the same are provided. A first layer is formed over a substrate, where the first layer comprises a semiconductor material. First and second trenches are etched, with each of the first and second trenches extending through the first layer and into the substrate. A wet etchant is introduced into the trenches, and the wet etchant etches a first opening below the first trench and a second opening below the second trench. Each of the first and second openings extends laterally below the first layer. The first and second openings are separated by a portion of the substrate adjoining the first and second openings. An oxidation process is performed to oxidize the portion of the substrate adjoining the first and second openings. An insulating material is deposited that fills the openings and the trenches.

Isolation regions for semiconductor structures and methods of forming the same

A semiconductor device includes a power transistor and a driving circuit. The driving circuit is coupled to and is configured to drive the power transistor and includes first and second stages. The second stage is coupled between the first stage and the power transistor. Each of the first and second stages includes a pair of enhancement-mode high-electron-mobility transistors (HEMTs). The construction as such lowers a static current of the driving circuit.

In one embodiment, a method of fabricating a semiconductor device having an isolated first transistor circuit and an isolated second transistor circuit is provided. The method comprises providing a silicon on insulator (SOI) wafer and fabricating an isolated first silicon region and an isolated second silicon region on the SOI wafer wherein each of the first silicon region and the second silicon region is bounded on its sides by a trench filled with insulator material. The method further comprises fabricating an active area comprising GaN on each of the first silicon region and the second silicon region to form the first transistor circuit and the second transistor circuit and fabricating source, drain, gate, and body connections for each of the first transistor circuit and the second transistor circuit.

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Hsinchu County, Taiwan

Mark Chen