Amazon Technologies, Inc.

Iii Holdings 2, LLC

Calxeda, Inc.

Other

Newisys, Inc.

Mark Bradley Davis

David James Borland

Asif Khan

Nafea Bshara

Thomas A Volpe

Robert Michael Johnson

Christopher Joseph Pettey

Islam Mohamed Hatem Abdulfattah Mohamed Atta

Erez Izenberg

Anthony Nicholas Liguori

Ken Goss

Prashant R Chandra

Jason Hobbs

Danny Marquette

Marc John Brooker

Adi Habusha

Marc Stephen Olson

Arnold Thomas Schnell

Yaniv Shapira

Prateek Tandon

Kypros Constantinides

Kenneth S Goss

Islam Atta

Norbert Paul Kusters

Matthew Shawn Wilson

Barry Ross Evans

Sumedh Wasudeo Sathaye

Daniel M Nold

George Robert Blair

Eric Jason Brandwine

Leonard Thomas Tracy

Rahul Gautam Patel

Uwe Dannowski

Timothy David Gasser

Niall Joseph Dalton

Tom Volpe

Vithal Dattatraya Shirodkar

Nachiketh Rao Potlapally

Justin Oliver Pietsch

Kari Ann O'Brien

Mark Noel Kelly

Stephen Callaghan

Derek Del Miller

Edward Crabbe

Trevor Robinson

Daniel T Marquette

Asif Kahn

Nobert Paul Kusters

The following description is directed to a logic repository service. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic of the configurable hardware. The method can include generating the configuration data for the configurable hardware. The configuration data can include data for implementing the application logic. The method can include encrypting the configuration data to generate encrypted configuration data. The method can include signing the encrypted configuration data using a private key. The method can include transmitting the signed encrypted configuration data in response to the request.

Logic repository service using encrypted configuration data

The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.

Configurable logic platform

Programmatically defined fields of metadata for a network packet may be generated. Instructions indicating different portions of data from different headers of a network packet may be stored at a packet processor. When a network packet is received, the different portions of the data may be extracted from the different headers of the packet according to the instructions and provided to other stages of the packet processor for processing. Different portions of the same programmatically defined field may be utilized at different stages in the packet processor. The programmatically defined field may be used to generate a hash value that selects an entry in a lookup table describing a forwarding decision for a network packet.

Generating programmatically defined fields of metadata for network packets

A method is performed by a first server on a chip (SoC) node that is one instance of a plurality of nodes within a cluster of nodes. An operation is performed for determine if a second one of the SoC nodes in the cluster has data stored thereon corresponding to a data identifier in response to receiving a data retrieval request including the data identifier. An operation is performed for determining if a remote memory access channel exists between the SoC node and the second one of the SoC nodes. An operation is performed for access the data from the second one of the SoC nodes using the remote memory access channel after determine that the second one of the SoC nodes has the data stored thereon and that the remote memory access channel exists between the SoC node and the second one of the SoC nodes.

Memcached server functionality in a cluster of data processing nodes

Methods and apparatus are disclosed for securely erasing partitions of reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a method of securely erasing an FPGA includes identifying one partition of previously-programmed resources in the FPGA, erasing the identified partition by storing new values in memory or storage elements of the identified partition, and storing new values in memory or storage elements of additional external resources electrically connected to the integrated circuit and associated with the identified partition. Thus, other partitions and subsequent users of the identified partition are prevented from accessing the securely erased data. A configuration circuit, accessible by a host computer via DMA, can be programmed into the FPGA reconfigurable logic for performing the disclosed erasing operations.

Controlling access to previously-stored logic in a reconfigurable logic device

A system on a chip (SoC) can be configured to operate in one of a plurality of modes. In a first mode, the SoC can be operated as a network compute subsystem to provide networking services only. In a second mode, the SoC can be operated as a server compute subsystem to provide compute services only. In a third mode, the SoC can be operated as a network compute subsystem and the server compute subsystem to provide both networking and compute services concurrently.

Multi-mode system on a chip

The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a plurality of reconfigurable logic regions. Each reconfigurable region can include hardware that is configurable to implement an application logic design. The host logic can be used for separately encapsulating each of the reconfigurable logic regions. The host logic can include a plurality of data path functions where each data path function can include a layer for formatting data transfers between a host interface and the application logic of a corresponding reconfigurable logic region. The host interface can be configured to apportion bandwidth of the data transfers generated by the application logic of the respective reconfigurable logic regions.

Configurable logic platform with multiple reconfigurable regions

Methods and apparatus are disclosed for programming reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a computing host includes one or more processors configured to execute a supervisor process and two or more user processes and a single FPGA integrated circuit configured into a plurality of partitions. The partitions include a host logic partition that is accessible only to the supervisor process executing on the computing host, and two or more accelerator partitions. Each of the accelerator partitions is configured to include a virtual debug unit with a logic analyzer that collects logic signals generated by logic within the respective accelerator partition and sends debug data indicating values of the logic signals to one of the user processes. In some examples, the host logic partitions and/or the accelerator partitions can be independently reprogrammed of each other within their respective portions of the single FPGA.

Extracting debug information from FPGAs in multi-tenant environments

A multi-tenant environment is described with configurable hardware logic (e.g., a Field Programmable Gate Array (FPGA)) positioned on a host server computer. For communicating with the configurable hardware logic, an intermediate host integrated circuit (IC) is positioned between the configurable hardware logic and virtual machines executing on the host server computer. The host IC can include management functionality and mapping functionality to map requests between the configurable hardware logic and the virtual machines. Shared peripherals can be located either on the host IC or the configurable hardware logic. The host IC can apportion resources amongst the different configurable hardware logics to ensure that no one customer can over consume resources.

Intermediate host integrated circuit between virtual machine instance and customer programmable logic

Growing community of inventors

Austin, TX, United States of America

Mark Bradley Davis