International Business Machines Corporation

Globalfoundries Inc.

Mark B Ritter

Paul William Coteus

Kerry Bernstein

Philip George Emma

Ruchir Puri

Jeannine Madelyn Trewhella

Ismail C Noyan

Modest M Oprysko

Daniel Joseph Friedman

Lawrence Jacobowitz

Raymond R Horton

Daniel Michael Kuchta

Michael J Palmer

Takeo Yasuda

Daniel J Stigliani, Jr

Dennis L Rogers

Albert E Ruehli

Mark F Bregman

Christian Schuster

Paul Andrew Moskowitz

Stephen Victor Kosonocky

Jason Scott Orcutt

Patryk Gumann

John Francis Bulzacchelli

Salvatore Bernardo Olivadese

Bipin Rajendran

Mark B Ketchen

Albert M Young

Douglas James Joseph

Allan Mark Hartstein

Ibrahim M Elfadel

Alexey Y Lvov

Michael Frank Cina

Charles Louis Haymes

Stanislav Vladimirovich Polonsky

Dennis L Karst

Christopher B Lirakis

José A Tierno

Jeehwan Kim

Seyoung Kim

George Frederick Walker

Thomas Mario Cipolla

Brian Paul Gaucher

Timothy C Reiley

Dan Moy

Alphonso Philip Lanzetta

Mitchell S Cohen

Young Hoon Kwark

Monty Montague Denneau

Glen Walden Johnson

Jeffrey John Welser

Harold S Stone

Marinus Hopstaken

Paul R Hoffman

Sudhir Muniswamy Gowda

Joachim Norbert Burghartz

Ralph Linsker

Mark S Milshtein

Peter G Ledermann

Philip Murphy

Roger Alan Pollak

Ravi S Ananth

Bernardo Hernandez

Stephen Louis Spanoudis

William D Brewer

Jeanine M Trewhella

Paul W Cotues

Uli Klepser

Thomas R&ouml;wer

A qubit control system for a quantum computer includes an optical waveguide configured to receive and transmit therethrough a wavelength division multiplexed optical signal which has a plurality of modulated optical carriers, each optical carrier being at a different optical wavelength and carrying a digital qubit control signal; an optical demultiplexer optically coupled to the optical waveguide to receive the multiplexed optical signal to recover the plurality of modulated optical carriers; a plurality of photodetectors in communication with the optical demultiplexer; a plurality of cryogenic filters in communication with the plurality of photodetectors, each being configured to filter corresponding one of the plurality of digital qubit control signals to provide a corresponding one of a plurality of analog qubit control signals which is directed to a corresponding superconducting qubit and the photodetectors. The cryogenic filters are provided at a cryogenic temperature.

Optically multiplexed quantum control interface

Techniques for a quantum device with modular quantum building blocks are provided. In one embodiment, a device is provided that comprises a substrate that is coupled with a plurality of qubit pockets, where at least one qubit pocket of the plurality of qubit pockets is coupled with a qubit. In one implementation, the device can further comprise a plurality of connectors coupled to the substrate and positioned around at least a portion of the substrate, where the plurality of connectors comprising a connecting element. In one or more implementations, the device can further comprise a plurality of transmission lines formed on the substrate and connect at least one connector of the plurality of connectors to at least one qubit pocket of the plurality of qubit pockets.

Quantum device with modular quantum building blocks

Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.

Methods and systems of neuron leaky integrate and fire circuits

A qubit control system for a quantum computer includes a source of a plurality optical carriers; an optical modulator to receive the plurality optical carriers and to modulate each optical carrier with a qubit control signal to provide a plurality of modulated optical signals; an optical multiplexer to provide a wavelength division multiplexed optical signal; an optical waveguide to receive and transmit the wavelength division multiplexed optical signal therethrough; an optical demultiplexer to receive the wavelength division multiplexed optical signal to recover each of the plurality of modulated optical signals; a demodulator to receive each of the recovered plurality of modulated optical signals to output a corresponding plurality of recovered qubit control signals to control subsets of a plurality of qubits.

Optically multiplexed quantum control

Embodiments are directed to a driver circuit including a first amplifier having a voltage follower configured to control a first node to maintain a voltage of the first node at a constant value. By maintaining the first node voltage, the first amplifier having the voltage follower is further configured to have a first amplifier output current into the first node at a value without the effect of the voltage fluctuation. The driver circuit further includes a second amplifier configured to control a second node, wherein the second amplifier is in a current mirror configuration with respect to the first amplifier such that a second amplifier current output is a highly precise mirror of the first amplifier current output.

Current mirror scheme for an integrating neuron circuit

A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.

Single-flux-quantum probabilistic digitizer

A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.

Resistive random access memory devices with extremely reactive contacts

Techniques are disclosed for minimizing the effects of soft errors associated with memory devices that are individually accessible. By way of example, a method of organizing a column in a memory array of a memory device protected by an error correction code comprises the step of maximizing a distance of the error correction code by maximizing a physical distance between memory bits associated with a memory line within the column protected by the error correction code. Other soft error protection techniques may include use of a feed forward error correction code or use of a memory operation (e.g., read or write operation) suppress and retry approach.

Soft error protection in individual memory devices

According to a technique, an electronic device is configured to correspond to characteristic features of a biological synapse. The electronic device includes multiple bipolar resistors arranged in parallel to form an electronic synapse, an axonal connection connected to one end of the electronic synapse and to a first electronic neuron, and a dendritic connection connected to another end of the electronic synapse and to a second electronic neuron. An increase and decrease of synaptic conduction in the electronic synapse is based on a probability of switching the plurality of bipolar resistors between a low resistance state and a high resistance state.

Electronic synapses from stochastic binary memory devices

A system, method, and design structure for address-event-representation network simulation are provided. The system includes a hardware structure with a plurality of interconnected processing modules configured to simulate a plurality of interconnected nodes. To simulate each node, the hardware structure includes a source table configured to receive an input message and identify a weight associated with a source of the input message. The hardware structure also includes state management logic configured to update a node state as a function of the identified weight, and generate an output signal responsive to the updated node state. The hardware structure further includes a target table configured to generate an output message in response to the output signal, identify a target to receive the output message, and transmit the output message. The hardware structure may further include learning logic configured to combine information about input messages and generated output signals, and to update weights.

System for address-event-representation network simulation

A method of and system for frequency clocking in a processor core are disclosed. In this system, at least one processor core is provided, and that at least one processor core has a clocking subsystem for generating an analog output clock signal at a variable frequency. Digital frequency control data and an analog signal are both transmitted to that at least one processor core; and that processor core uses the received analog signal and digital frequency control data to set the frequency of the output clock signal of the clocking subsystem. In a preferred implementation, multiple cores are asynchronously clocked and the core frequencies are independently set.

Method and system for analog frequency clocking in processor cores

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Sherman, CT, United States of America

Mark B Ritter