International Business Machines Corporation

Other

Qualcomm Incorporated

Mark Anthony Rinaldi

Clark Debs Jeffries

Marco C Heddes

Gordon Taylor Davis

Michael Steven Siegel

Jean Louis Calvignac

Colin Beaton Verrilli

Piyush Chunilal Patel

Andreas Guenther Herkersdorf

Brian Mitchell Bass

Anthony Matteo Gallo

Ross Boyd Leavens

Fabrice Jean Verplanken

Natarajan Vaidhyanathan

Mohammad Peyravian

Mattheus Cornelis Antonius Adrianus Heddes

Timothy W Gee

Malcolm Scott Ware

Charles Robert Lefurgy

Thomas M Brey

Kenneth James Barker

Everett Arthur Corl, Jr

Ravinder Kumar Sabhikhi

Jeffrey James Lynch

Gregory Salyer

Aaron Eliahu Merkin

Brian Alan Youngman

David W Nuechterlein

Loren Douglas Larsen

Price Ward Oman

Kartik Sudeep

Vito W Russo

Ravinder Kumar Sabhiki

Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit (CPU)-based system is disclosed. In some aspects, a compressed memory controller (CMC) provides an LLC comprising multiple LLC lines, each providing a plurality of sub-lines the same size as a system cache line. The contents of the system cache line(s) stored within a single LLC line are compressed and stored in system memory within the memory sub-line region corresponding to the LLC line. A master table stores information indicating how the compressed data for an LLC line is stored in system memory by storing an offset value and a length value for each sub-line within each LLC line. By compressing multiple system cache lines together and storing compressed data in a space normally allocated to multiple uncompressed system lines, the CMC enables compression sizes to be smaller than the memory read/write granularity of the system memory.

Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit (CPU)-based system

A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design, for allocating processing functions between a primary processor and a secondary processor is disclosed. A primary processor is provided that performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Structure for asymmetrical performance multi-processors

Systems, methods and media for allocating processing functions between a primary processor and a secondary processor are disclosed. In one embodiment, a primary processor performs routine processing duties, including execution of application program code, while the secondary processor is in a sleep state. When the load on the primary processor is deemed to be excessive, the secondary processor is awakened from a sleep state and assigned to perform processing functions that would otherwise need to be performed by the primary processor. If temperatures in the system rise above a threshold, the secondary processor is returned to the sleep state.

Systems and methods for asymmetrical performance multi-processors

An improved solution for authenticating a user seeking to manage a computer system is provided according to aspects of the invention. A user seeking to perform out-of-band management of the computer system can provide a set of credentials to a service processor, which in turn provides them to the computer system for authentication. Additionally, a user seeking to perform in-band management of the computer system can provide a set of credentials to a management agent executing on the computer system for authentication. In either case, the computer system can authenticate the set of credentials, e.g., using an operating system interface.

Authentication for computer system management

Computers are caused to provide a hash table wherein each entry is associated with a binary key and indexed by a selected portion of a hash value of the associated key, and points to a data structure location for storing non-selected portions of, or the entire hash value of, the binary key, and action data corresponding to the value of the binary key. Content addressable memory entries store a binary key, or a value unique to it, and an association to a corresponding action. Pointers to the data structure use selected portions of binary key hash values as an index when not selected portions of hash values of other binary keys, and associations are established between CAM entry and associated data structure locations when selected portions of the hash values of the binary keys are the same as selected portions of hash values of one or more other binary keys.

Lookups by collisionless direct tables and CAMS

A Resource Reservation System includes a Token Generation Unit (TGU) which generates and circulates among nodes of a communications system a Slotted Token (SLT) message having sub-fields to carry identification number for each input port in a node and the resource available for each input port. On receiving the message the Resource Control Unit (RCU) in each node can write port identification number, available resource in appropriate sub-fields of the SLT message, and reserve resources in other nodes by adjusting information in the sub-field associated with the other nodes.

Apparatus and method to reserve resources in communications system

A structure and technique for preventing collisions using a hash table in conjunction with a CAM to identify and prevent collision of binary keys. A portion of the hash value of a binary key, which does not collide with a portion of the hash value of any other reference binary key, is used as an entry in the hash table. If two or more binary keys have identical values of the portions of the hash values, each of these binary keys are stored in their entirety, in the CAM. The key in the CAM provides a pointer to a data structure where the action associated with that binary key is stored. If the binary key is not found in the CAM, the binary key is hashed, and a specific entry in the hash table is selected using a portion of this hash value.

Lookups by collisionless direct tables and cams

A structure and technique for preventing collisions using a hash table in conjunction with a CAM to identify and prevent collisions of binary keys. A portion of the hash value of a binary key, which does not collide with a portion of the hash value of any other reference binary key, is used as an entry in the hash table. If two or more binary keys have identical values of the portions of the hash values, each of these binary keys are stored in their entirety, in the CAM. The key in the CAM provides a pointer to a data structure where the action associated with that binary key is stored. If the binary key is not found in the CAM, the binary key is hashed, and a specific entry in the hash table is selected using a portion of this hash value.

A histogram difference method and system for power/performance measurement and management has low data storage requirements while supporting multiple monitoring applications having different update rates. Histogram data for power usage and/or performance mode is collected at a predetermined rate and the histogram data is read out at periodic intervals by the monitoring applications. The monitoring applications subtract the histogram data from previously read histogram data set to determine a interval difference histogram. The minimum and maximum values for the interval are the lowest-valued and highest-valued bin in the interval difference histogram that have a count greater than zero. The average value for the interval is the mean of the interval difference histogram. A conservative bound of the maximum and minimum values for a system can be determined by adding the values of the maximum and minimum values determined for each subsystem in the system.

Histogram difference method and system for power/performance measurement and management

Apparatus, method and computer program to reserve resources in communications system

Lookups by collisionless direct tables and CAMs

A method and apparatus useful in network management which makes intelligent, high speed, connection allocation decisions, overcoming difficulties encountered heretofore and providing enhanced network services. During episodes of network congestion, some connection requests for a class of service of low value and with currently a high number of existing connections may be purposefully ignored (not acknowledged with an Acknowledge (ACK) packet) so that the processing capability of a device will not become overwhelmed, causing the dropping of new connection is to note the numbers of connections of different classes relative to their service-level contracts, to ignore abundant, low-value connection requests in accordance with value policies when and only when necessary, and to insure that valuable new connection requests that conform to their contract connection rates can be intelligently accommodated.

Connection allocation technology

Novel data structures, methods and apparatus for a Software Managed Tree (SMT) which provides a mechanism to create tree structures that follow a search mechanism defined by a control point processor. The search mechanism does not require storage on the previous pointer and uses only a forward pointer along with a next bit or group of bits to test thereby reducing storage space for nodes. The search mechanism processes multiple filter rules for an application without requiring multiple searches and also allows various filter rules to be chained. Two patterns of the same length are stored in each leaf to define a range compare. A compare at the end operation is either a compare under range or a compare under mask. In a compare under range, the input key is checked to determine if it is in the range defined by the two patterns. In a compare under mask, the bits in the input key are compared with the bits in a first leaf pattern under a mask specified in a second leaf pattern.

Software management tree implementation for a network processor

A container has a first and a second opening formed in a lid that releasably closes the container. A first base surrounds the first opening and a second base surrounds the second opening. The narrow end of a retractable, self-deploying funnel engages the first opening and the wide end of a retractable, self-deploying pour spout engages the second opening. Both funnel and pour spout are retracted when the first and second caps engage the first and second bases, respectively. The funnel facilitates charging of a liquid into the container and the pour spout facilitates pouring of a liquid from the container. Each cap includes a vent opening formed in a top wall and a nipple formed in depending relation to an interior surface of the top wall. The nipple plugs the narrow end of the pour spout when the pour spout is in its fully retracted configuration.

Caps for self-deploying funnel and pour spout

Growing community of inventors

Durham, NC, United States of America

Mark Anthony Rinaldi