L-3 Communications Integrated Systems L.p.

Abg Tag & Traq, LLC

Mark Allen Chivers

Sujit Ravindran

Gerald Lothair Fudge

James Edward Harvey

Michael R Custer

Ronald R Lancaster

Philip N Chivers

Ross E Bland

Alex Yeh

The present invention is for a method and apparatus to improve an ultra wideband (UWB) digital receiver's performance sensitivity. A transmitted signal stream has each data bit having multiple identical modulated pulses separated by a constant time interval. The received signal stream is applied to a plurality of signal processing groups where the original signal is duplicated in each processing group. The duplicated signal stream in each signal processing group is delayed by a different constant time interval between modulated pulses in the original signal stream and the two signal streams in each signal processing group is correlated and magnitude summed and combined to form a final signal stream which is detected to improve the sensitivity of the receiver.

Ultra wideband time-delayed correlator

The present invention is for an access shield for a shipping container, which container has a pair of doors and a plurality of supporting feet. An access shield for the shipping container is placed under the door end of the shipping container and is contained by the shipping container's weight with a pair of locking arms positioned behind the shipping container's feet to block access into a shipping container.

Access shield for shipping container

This invention relates to capturing and processing the full bandwidth of an Ultra-Wideband (UWB) signal. An incoming UWB signal is processed in two different analog signal bands in parallel and their magnitudes summed to facilitate a Field programmable gate array (FPGA) processing of the entire UWB bandwidth to minimize digital implementation loss and promote a higher range.

Ultra-wideband dual band magnitude summer apparatus and method

Systems and methods that provide clock jitter compensation architectures that improve the performance of direct radio frequency (RF) receivers by injecting a calibration tone into the received radio frequency (RF) signals in order to help identify and then compensate for the clock jitter noise. After injecting the tone, the jitter noise going through the direct RF bandpass sampling receiver is estimated using a narrow bandwidth filter, and the received signals are further processed and demodulated depending on the Nyquist zone of the received signal. The relative modulation factor for the modulation is computed and then applied to the Nyquist zone to de jitter that particular Nyquist zone.

System and method for clock jitter compensation in direct RF receiver architectures

Improved spur reduction architectures that improve linearity in direct radio frequency (RF) receiver architectures. Non-uniform sampling in the form of sampling clock phase (or frequency) modulation is used to induce phase (or frequency) modulation on signals that are being received from a given Nyquist zone. At the output of the ADC (analog-to-digital converter), the signals are de-modulated to remove the induced modulation based on the Nyquist zone that is being received. The de-modulation process results in non-desired spurious artifacts (interfering leakage signals and ADC spurs) being spread in the frequency domain. Strong spurious artifacts may be removed after measuring the induced modulation and de-modulating. For the case of weak spurious artifacts, the de-modulation for the desired Nyquist zone spread these signals in the frequency domain. Induced modulation on signals may also provide a dithering effect on the ADC.

System and method for improved spur reduction in direct RF receiver architectures

Shipping container door shield

An automatic background noise estimator (BNE) seed calculator for determining a starting point for a BNE circuit which tracks the noise floor received by a receiver. The BNE seed calculator may sample a plurality of data points from the receiver and calculate the magnitude of each point. The seed calculator may then determine the peak magnitude value, a plurality of mean values, and the variance of the sampled points. A plurality of lookup tables are used to compare the peak, mean, and variance values with simulated peak, mean, and variance values to estimate the noise floor level of the actual signal and use that to determine the optimum BNE seed value. Simulation software such as MATLAB is used to develop the lookup tables by simulating peak, mean, and variance values based on a plurality of signal-to-noise ratios (SNR).

Automatic BNE seed calculator

Embodiments of the present invention provide a temperature compensating circuit. The circuit generally includes a clock element operable to provide an adjustable clock signal, a buffer element coupled with an analog-to-digital converter and operable to receive the adjustable clock signal, a temperature sensor operable to sense a temperature, and a logic element coupled with the clock element and the temperature sensor. The logic element is operable to acquire the temperature from the temperature sensor and adjust the clock signal based upon the acquired ambient temperature. Such a configuration compensates for temperature variations and reduces system complexity and required component space, thereby providing a compact and efficient design.

Temperature compensated clock delay closed loop circuit

Reconfigurable direct radio frequency (RF) bandpass sampling receivers are disclosed that utilize analog interpolation filters to improve performance. The addition of the analog interpolation filter to the bandpass sampling receiver allows the quantization clock to be de-coupled from the RF sampling clock. As such, the quantization can be performed at a much slower rate than the initial RF sampling allowing the final analog bandwidth to be much narrower than the bandwidth of the first stage filter located before the high-speed sampler. The combination of a tunable bandpass filter, tunable bandpass sample clock and analog interpolation filter followed by a further stage of sampling and quantization at a slower rate than the bandpass sample clocking, therefore, provides significant advantageous by de-coupling the quantization sample rate from the high-speed sample rate. If desired, the analog interpolation filter may also be tunable. Other variations and implementations are also described.

Direct bandpass sampling receivers with analog interpolation filters and related methods

Nyquist folded bandpass sampling receivers are disclosed that utilize wideband filters and modulated sampling clocks to identify received signals. In operation, multiple Nyquist zones are allowed to fold on top of each other during sampling. Because the RF sampling clock is modulated, separate frequency modulations can be induced within each Nyquist zone. The signals that are folded together from different Nyquist zones can then be identified and distinguished. In particular, when the Nyquist zones fold on top of each other, the different signals from different Nyquist zones can be separated and identified based on the fact that the added modulation is different for each Nyquist zone. Thus, by using one or more clock modulations to induce frequency modulations that are Nyquist zone dependent, multiple Nyquist zones can be aliased together while still allowing for signals from different Nyquist zones to be separated and identified. Other variations and implementations are also described.

Nyquist folded bandpass sampling receivers and related methods

Nyquist folded bandpass sampling receivers are disclosed that utilize narrow band filters in parallel with wideband filters to enhance reception of ultra wideband (UWB) pulses. The addition of the narrow band filter facilitates the reception of ultra wideband signal pulses and, therefore, extends the Nyquist folding bandpass sampling receiver to allow improved processing of ultra wideband (UWB) pulses. RF sampling circuitry utilizing a modulated sampling clock signal can then better capture UWB pulse signals.

Nyquist folded bandpass sampling receivers with narrow band filters for UWB pulses and related methods

An interpolation circuit () generates a plurality of intermediate amplitude values linearly related to two consecutive signal amplitude values using a system of adders and memory elements. A first stage () of the interpolation circuit calculates a one-half amplitude value; a second stage () calculates one-fourth and three-fourths amplitude values, and a third stage () calculates one-eighth, three-eighths, five-eighths, and seven-eighths amplitude values. A comparator () receives a threshold value () and compares each of the intermediate amplitude values to the threshold value. A decoder () generates a time of arrival adjustment value that is subtracted from a low resolution time of arrival to generate a high resolution time of arrival.

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McKinney, TX, United States of America

Mark Allen Chivers