Intel Corporation

Freescale Semiconductor,inc.

Motorola Corporation

Fujitsu Semiconductor Limited

Mark Alan Kirschenmann

Daniel B Schwartz

Omid Oliaei

Chuanzhao Yu

Bing Xu

David A Newman

Pravin Premakanthan

Mahib Rahman

Dale Gerard Schwent

Claudio Gustavo Rey

Joel Lloyd Gross

David B Harnishfeger

George Norris

Sumit Anil Talwalkar

Robert S Trocke

Lillian G Lent

William Alexander Bucher

Kurt Hausmann

Jeffrey D Ganger

Darioush Keyvani

Derek K Wong

Walter J Grandfield

Clay Garlen Jones

Apparatus and method to provide a high speed digital signal processor may implemented in a substantially all digital transmitter designs. In an embodiment, input binary bits are divided into two sets of bits, where one set is provided to a binary to thermometer coder to generate an output mixed with a clock signal to operatively provide a reverse order inverted bit pattern. The other set of binary bits is subject to exclusive-or processing such that processing of the two sets operatively provides a mixed hybrid code to be fed from high speed digital signal processor. Additional apparatus, systems, and methods are disclosed.

High-speed digital signal processing systems

In accordance with some embodiments of the present disclosure, a control path for a wireless communication device may include a radio frequency coupler having a coupled port and a terminated port, the radio frequency coupler configured to couple at least a portion of a transmission power of a transmission line coupled to the antenna tuner such that the coupled port carries a first signal indicative of an incident power transmitted to an antenna coupled to the antenna tuner and the terminated port carries a second signal indicative of a reflected power reflected by the antenna. the control path may also include a control module configured to communicate the one or more control signals to the antenna tuner for controlling the impedance of the antenna tuner based at least on the first signal and the second signal.

System and method for tuning an antenna in a wireless communication device

In accordance with some embodiments of the present disclosure, a method may include determining a range of frequencies allocated to resource blocks to be transmitted during a subsequent sub-frame slot or sounding reference symbol sub-slot. The method may also include determining an approximate center frequency of the range of frequencies. The method may additionally include modulating resource blocks of the sub-frame or sounding reference symbol sub-slot at the approximate center frequency. The method may further include transmitting the modulated resource blocks at the approximate center frequency.

System and method for frequency-agile transmission in a wireless communication device

A method of performing complementary mixing may include performing an exclusive OR (XOR) function with respect to an I-channel symbol based on an oscillator signal to produce an I-channel output signal with bits that alternate between the I-channel symbol and a complement of the I-channel symbol in response to the oscillator signal rising and falling. The method may also include performing the XOR function with respect to a Q-channel symbol based on the oscillator signal to produce a Q-channel output signal with bits that alternate between the Q-channel symbol and a complement of the Q-channel symbol in response to the oscillator signal. Further, the method may include combining the I-channel output signal and the Q-channel output signal based on adding operations performed with respect to an I-channel extra bit signal, a Q-channel extra bit signal, the I-channel output signal, and the Q-channel output signal to generate a complementary mixed signal.

Complementary signal mixing

In accordance with some embodiments of the present disclosure, a method for estimating and correcting phase shift in a wireless communication device, may include converting a digital signal output by digital circuitry of the wireless communication device into a compensated digital signal based on a calculated phase error. The method may also include converting the compensated digital signal into a wireless communication signal. The method may additionally include calculating an estimated instantaneous reference phase of the digital signal output by the digital circuitry. The method may further include calculating an estimated transmit phase of the wireless communication signal. Moreover, the method may include calculating a phase error based on a difference between the estimated instantaneous reference phase and the estimated transmit phase of the wireless communication signal.

System and method for estimating and correcting phase shift in a wireless communication device

In accordance with some embodiments of the present disclosure, a circuit comprises a balun configured to receive a radio frequency (RF) signal at a first input port and a second input port of an input coil. The balun is further configured to output the RF signal at an output coil communicatively coupled to the input coil. The circuit also comprises a supply voltage selector circuit coupled to the input coil and configured to adjust a bias voltage at the input coil according to a power level of the RF signal received at the input coil.

System and method for improving power efficiency of a transmitter

In accordance with some embodiments of the present disclosure, a transmitting path comprises a digital to analog converter (DAC) configured to receive digital data signals and convert the digital data signals into analog data signals. The transmitting path further comprises a first transmission protocol path and a second transmission protocol path configured to receive a first data signal and second data signal, respectively, from the DAC. The first data signal is associated with a first transmission protocol and the second data signal is associated with the second transmission protocol. The transmitting path additionally comprises a mixer coupled to the first and second transmission protocol paths and configured to receive at least one of the first data signal and the second data signal and modulate at least one of the first data signal and the second data signal onto a carrier signal to generate a radio frequency (RF) signal.

System and method for a dual-path transmitter

An integrated transmit circuit includes a voltage controlled oscillator () for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit () which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (-) configured in a matched switching topology () so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (&#xd8;, &#xd8;, . . . &#xd8;, &#xd8;). By applying the interleaved LO pulses to control the transmission gates (, and) in the upmixer (), the +I, &#x2212;I, +Q, &#x2212;Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs ().

Quarter duty cycle pulse generator for interleaved switching mixer

A multi-band RF transmitter circuit () for a wireless communication device combines a plurality of RF transmission blocks into a single transceiver integrated circuit which includes a shared broadband SVGA (), a shared tunable balun (), and an output switching network () at the output of the balun to support three different frequency bands. The outputs of the multi-band RF transmitter circuit are connected to separate external power amplifier circuits (-), where each power amplifier circuit generates an amplified signal for one of the plurality of predetermined frequency bands.

RF multiband transmitter with balun

An apparatus and method for dual mode power control. A transmitter is capable of operating in a first mode of operation and a second mode of operation, the first mode of operation and the second mode of operation including a closed loop control mode and an open loop control mode, the first mode of operation being different from the second mode of operation. The transmitter can be operated in the first mode of operation. A transmitter output power characteristic of the first mode of operation can be read back. The transmitter output power characteristic of the first mode of operation can be correlated to a transmitter output power characteristic of the second mode of operation. The first mode of operation can be switched to the second mode of operation based on the transmitter output power characteristic of the second mode of operation.

Method and apparatus for dual mode power control

A direct digital synthesizer (DDS) such as a Quantized Interpolated Edge Timed (QuIET) synthesizer is implemented in the feedback path of a translational Phase Lock Loop (PLL). The frequency translation introduced by the synthesizer reduces the amplification of reference feedback path noise sources, thereby enabling a wider loop bandwidth and improving high-pass filtering of phase noise without the addition of a second PLL.

Translational phase locked loop using a quantized interpolated edge timed synthesizer

A phase rotator for a Cartesian feedback power amplifier in a transmitter final stage contains an integrated voltage controlled tunable resonant circuit accomplishing band-pass filtering at a center frequency selected by local oscillator (LO) coarse trim control signals. The voltage controlled tunable resonant circuit attenuates input signal harmonic levels at large fractional bandwidths for the downconverter in the feedback LO path without setting a large number of poles in the band-pass filter. The binary-weighted course trim value for controlling the gain of the LO sets a bank of voltage-variable capacitors (VVC) in the voltage controlled tunable resonant circuit to control the center frequency in each of two 2-pole band-pass filters, creating a composite 4-pole band-pass filter at the input of a poly-phase quadrature generation circuit in the feedback LO path.

Center frequency control of an integrated phase rotator band-pass filter using VCO coarse trim bits

Systems and methods are described for a sideband suppression technique for quadrature modulation using magnitude measurements. Gain imbalance, phase imbalance, or both gain and phase imbalance are corrected in a quadrature modulator. Predetermined voltage levels are applied to one or both of the quadrature modulator input channels and resultant output magnitudes are measured. Then, a gain correction factor, a phase correction factor or both gain and a phase correction factors are determined as a function of the measured output magnitudes. Gain imbalance, phase imbalance or both gain and imbalance are then corrected using the gain and phase correction factors.

Sideband suppression method and apparatus for quadrature modulator using magnitude measurements

An apparatus and accompanying method for demodulating with baseband Doppler frequency shift compensation. An RF section (20) down-converts received data communication signals (12) to baseband. A/D converters (24, 26) digitize I, Q quadrature baseband signal components. Phase (32) and frequency (50) tracking loops reside on a common digital ASIC substrate (28). A complex multiplier (30) rotates digitized baseband signals by a digitized oscillation signal, producing Doppler shift compensated signals. The phase tracking loop (32) estimates data and generates a pure phase error signal from which data modulation and Doppler shift compensation influences have been removed, which drives a frequency discriminator (52) that identifies either clockwise or counterclockwise phase rotation for each symbol (18). An integrator (54) combines identification results over a burst and a numerically controlled oscillator (56) adjusts the digitized oscillation signal frequency in a constant frequency step. This adjustment takes place once for each burst.

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Chandler, AZ, United States of America

Mark Alan Kirschenmann