Texas Instruments Corporation

Mark A Wolfe

Indumini W Ranmuthu

Rajarshi Mukhopadhyay

Arup Polley

Reza Sharifi

Davy H Choi

Sami Kiriaki

Priscilla Enid Escobar-Bowser

Kerry C Glover

Rida Shawky Assaad

Michael H Haight

Glenn C Mayfield

Yukihisa Hirotsugu

William Martin Torres Escajadillo

Jefferson W Gamble

A system and method for Flex Over or On Suspension (FOS) fault detection under a write gate for magnetic disk drives may employ a flex over suspension fault comparator that compares a predetermined reference threshold to a positive delta of a disk drive write head data stream and outputs a positive or negative FOS fault indication. A max/min buffer detects polarity of a disk drive read/write head and applies a positive buffered delta to the fault comparator. A transition-free window detector triggers the fault comparator to output the fault indication when a transition-free window of zero-value data bits of a predetermined length is detected from the disk drive head, and the transition-free window detector provides a fault validation signal to validate output of the fault comparator when the transition-free window of zero-value data bits of the predetermined length is detected from the disk drive head.

Flex over suspension fault detection under a write gate for magnetic disk drives

A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

Proximity sensing system

A disk drive data storage system comprising at least one data storage disk and a sensor assembly proximate the data storage disk. The sensor assembly further comprises circuitry for writing data to the data storage disk and circuitry for reading data from the data storage disk. The system also comprises circuitry for controlling the circuitry for reading data during different time periods so that the circuitry for reading data consumes different levels of power while the circuitry for writing data is writing data to the data storage disk.

Disk drive with multiple level power reduction during write

A biasing scheme is disclosed that helps reduce current noise in an associated device, such as, for example, a magneto-resistive device. The biasing scheme provides for setting a resistance path in a preamplifier, which is operative to energize the associated device, based on a biasing current that is to be used with associated device. Alternatively or additionally, the resistance path can be set based on a resistance of the associated device. As a result of setting the resistance path in this manner, noise through the associated device can be mitigated during its energization.

Preamplifier system having programmable resistance

The invention comprises a differential sample-and-hold circuit including a differential gain stage. The differential gain stage comprises a control transistor and an output node. The differential gain stage further comprises a primary load coupled between the control transistor and the output node. A hold control circuit is coupled to the base of the control transistor, the hold control circuit operable to effect a reduction of the base voltage of the control transistor and a corresponding reduction of the voltage at the output node of the differential gain stage.

Sample-and-hold circuit

A read channel (18) for use in a mass storage system is provided. The read channel (18) includes a plurality of circuit modules circuit and an error estimation circuit (50). The plurality of circuit modules may include circuitry such as a VGA (40), an LPF (42), and an equalizer (48), for conditioning an analog data signal. The plurality of circuit modules receive the analog data signal from a disk/head assembly (12) and condition the signal to generate a digital data signal. The error estimation circuit (50) receives an analog signal from one of the plurality of circuit modules, such as the equalizer (48), and analyzes the analog signal to generate an analog error output signal (94) that is used in the read channel (18) and provided to external circuitry.

Error estimation circuit and method for providing a read channel error

A read/write configuration (44) is provided for switching signals between a source (46) and either a single output (60) or a plurality of outputs (60) and (62). A control circuit (68) operates to control a signal switching circuit (64) and a power supply switching circuit (66) in response to a control signal input thereto. More particularly, in a reading mode, the switches within signal switching circuit (64) are opened while the switch within power supply switching circuit (66) is closed. Further, in a writing mode, the switches within signal switching circuit (64) are closed while the switch within power supply switching circuit (66) is opened.

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Plano, TX, United States of America

Mark A Wolfe