Glenayre Electronics, Inc.

Mark A Walker

Thomas L Frederick

David E Jones

Claudio Gustavo Rey

Robert Richard Leyendecker

David Kent Bonds

Paul Andrew Goud

Patricia Fern Kavanagh

Derek Stephen Hilborn

Kevin Patrick Murphy

Charles Brian Cox

Vladimir Pavlovic

David W Kroeger

Theron Lee Jones

Jay Jui-Chieh Chen

Richard Johnathan Hinkle

Ray Mr Sewlochan

Emre Tapucu

Terry Lee Hinkle

Gerald D Deters

Wayne Douglas Duello

Joel Richard Dierks

Flaviu C Costescu

A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier. The bias circuit provides to the output transistor a first bias level during the preheat period and a second bias level during the transmit period. This first bias level is predetermined to cause the output transistor to reach the steady-state junction temperature achieved by the output transistor during the transmit period (i.e., when transmitting output signals biased with the second bias level). The preheat period ends when this steady-state temperature is reached. Thus, the power amplifier can then transition to a transmit period having already reached the steady-state junction temperature. Because the output transistor is already heated to the steady-state junction temperature, 'thermal' distortion (i.e., the distortion incurred when the output transistor's junction temperature changes while transmitting) is avoided and the key-up time is reduced.

Method and apparatus for reducing key-up distortion by pre-heating

A linear transmitter (101) using predistortion includes a modulator (103), a predistorter (107), a digital quadrature modulator (111), an upconverter (113), a power amplifier (115), and an antenna (117). In addition, the transmitter (101) has a feedback loop including a coupler (119), a downconverter (123), a digital quadrature demodulator (125), and a trainer (131). The digital data to be transmitted is provided into the modulator (103), which converts the digital data into in-phase and quadrature component signals. The in-phase and quadrature component signals are then provided to the predistorter (107), which 'predistorts' the component signals prior to amplification. The digital quadrature modulator (111) converts the component signals into a single analog signal. The upconverter (113) upconverts this signal from the predistorter (107) into the desired frequency of transmission, which is provided to the power amplifier (115) and the antenna (117) for amplification and broadcast. The coupler (119) provides a portion of the amplified signal to the analog downconverter (123), which lowers the frequency of this signal to a range that is easily processed. The signal is then provided to the digital quadrature demodulator (125), which outputs the in-phase and quadrature component signals of the signal. These in-phase and quadrature component signals are provided to the trainer (131) which analyzes them with the output signals from the modulator. The trainer (131) compares these signals and updates the predistorter (107) so that the digital quadrature demodulator (125) output signals are substantially equivalent to the modulator (103) output signals.

Linear transmitter using predistortion

An input radio frequency signal to be amplified is fed to the gate terminals of parallel field effect power transistors through impedance matching networks that comprise parallel resistor-capacitor combinations. The capacitor is selected so that it is self-resonant at the frequency of operation, thereby preventing attenuation of the input signal at that frequency. A shunt resistor is coupled between the gates of the parallel transistors to eliminate odd mode oscillations.

High-power amplifier using parallel transistors

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Palmyra, MO, United States of America

Mark A Walker