Motorola Corporation

International Business Machines Corporation

Freescale Semiconductor,inc.

Mark A Kearney

Marvin A Denman

Seungyoon P Song

Bryan P Black

Juxiang Ren

Bernard J Pappert

Robert Scott Ruth

David P Burgess

Graham R Murphy

Milton M Hood, Jr

Jeff L Warner

Lavanya Kling

A semiconductor device includes CMP dummy tiles () that are converted to active tiles by forming well regions () at a top surface of the dummy tiles, forming silicide () on top of the well regions, and forming a metal interconnect structure () in contact with the silicided well tie regions for electrically connecting the dummy tiles to a predetermined supply voltage to provide latch-up protection.

Active tiling placement for improved latch-up immunity

A data processor (10) has a branch target address cache (48) for storing the target addresses of a number of recently taken branch instructions. Normally, each fetch address is compared to the contents of the branch target address cache. If a hit occurs, then the data processor branches to the cached target address. The data processor also has a dispatch unit (60) that invalidates the data stored in the branch target address cache if and when it determines that the branch target address cache 'hit' on an instruction that was not a branch instruction at all, a 'phantom branch.' The data processor thereby automatically invalidates its branch target address cache data after a context switch.

Data processor with branch prediction and method of operation

The disclosed data processor (10) dispatches load/store multiple and load/store string instructions to a load/store unit (28) as a sequence of simple load or store instructions. The sequencer unit (18) assigns an entry of a rename buffer (34) to which the load/store unit writes back the data of each simple load instruction. This strategy facilitates early data forwarding for subsequent instructions. Conversely, the sequencer unit supplies a rename buffer tag to the load/store unit if it is not able to supply the operands of a simple store instruction.

Data processor with an execution unit for performing load instructions

Growing community of inventors

Austin, TX, United States of America

Mark A Kearney