3com Corporation

3com Technologies

Mark A Hughes

Daniel M O'Keeffe

Kevin Loughran

Neil O Fanning

Joseph N Butler

Eugene O'Neill

Anne G O'Connell

Paul J Moran

Una Quinlan

John F Hickey

Con David Cremin

Paul O'Keeffe

J Noel Butler

A method and switch for controlling the allocation of priority of TCP packets, more particularly for distinguishing between data and control packets and assigning an increased priority to control packets. The layer 4 information in the form of the flag bits of the header are snooped in the switch to determine whether any flag other than PSH is set and if so to allocate a priority to that packet, which will usually be a higher priority than data packets.

TCP control packet differential service

In a stack of network units each includes a multiplicity of ports for receiving and forwarding addressed data packets and a forwarding engine which in response to address data selects at least one port for the forwarding of a data packet. A cascade connects the units and allows the transmission of a packet placed on said cascade by a unit to all the other units. Each unit is responsive to a packet received from the cascade to forward or discard the received packet according to predetermined forwarding rules. A trunk includes a respective port of each of some but not necessarily all the units. Each unit includes a 'trunk box member' register indicating which of the units has at least one port connected in the trunk When a first unit in the stack receives, at a port connected neither to the trunk nor the cascade, a packet destined for the trunk, the first unit directs that packet to a port connected to the trunk if the first unit has such a port and otherwise sends that packet to the cascade. When a second unit in the stack, having a port connected to the trunk, receives by way of the cascade from the first unit a packet destined for the trunk, the second unit determines with recourse to the forwarding rules, data identifying the first unit and the respective register whether to forward said packet to the trunk. The invention is particularly intended for use in stack-wide trunks operating according to 'local forwarding' and &lsquo;next-in-line&rsquo; rules and allows units in the stack to be omitted from direct connection to the trunk.

Stackable network unit including register for identifying trunk connection status of stacked units

A network switch comprises a multiplicity of ports for receiving and forwarding addressed data packets, a forwarding engine for directing packets received at the ports to at least one other port, a register for storing unit identifications of a set of units including the network unit, and hashing logic for selecting one of the unit identifications in response to address data in a packet. The forwarding engine makes a determination whether the one of the unit identifications corresponds to the network unit and is operative to direct the packet in accordance with that determination. The use of the register enables a substantial increase in the number of ports that can be members of a stack-wide trunk.

Stackable network unit including registers for identifying stack members and trunk ports

A trie searching technique employs entries each including a pointer to the next block in the search and a status indication and also including start and end indexes which define a selected section of the trie key identifying an entry within the block identified by the pointer. Thereby the program for selection of the search key is defined by the trie entries themselves, enabling a general variety of search selections and jumps to avoid any unnecessary parts of the trie search key.

Method and apparatus for searching databases employing a trie search structure

A last-in first-out data stack is able to store a plurality (n) of elements wherein the plurality is greater than two. For each of n storage locations in the stack a selector is adapted to receive n elements read out from the stack and a new element. The selector is arranged to make a controllable selection of its received elements. Combinational logic capable of performing logic manipulations on the selection of elements provides a resultant for pushing onto the stack.

Last-in first-out data stacks and processing data using such data stacks

An application specific integrated circuit includes a clock recovery circuit which recovers from an input signal a repetitive sequence of data values wherein no two consecutive values are the same and a recovered clock. An address generator responds to the recovered clock to cause storage of the data values in said memory in a set of locations having addresses generated by the address generator, so that the address generated by the generator increments in response to a repetitive transition in the recovered clock. The existence of a clock glitch is found by reading the data values from the set of locations to determine whether any two consecutive locations contain the same data value.

On-chip detection of clock gitches by examination of consecutive data

A high speed link between chips and comprising a multiplicity of synchronous serial data channels includes an onboard detector for detecting an error rate for each channel. The transmitter and the receiver chips are configured in response to the detector to select the channel having the lowest error rate as the control channel and optionally to render at least the channel with the highest error rate inactive.

High speed parallel bit error rate tester

A plurality of serial data streams are transmitted on a corresponding plurality of lines at a common frequency in equal groups of symbols. A framing signal composed of groups of symbols corresponding in number to groups of data symbols is transmitted on an additional control line. Each group of symbols in the framing signal includes a majority of symbols capable of representing a first plurality of code words and a second plurality, substantially less than the first plurality, of valid code words, and a minority of symbols which constitute parity check symbols. Each of the valid code words consists of a first sub-group of similar symbols and a second plurality of similar symbols. For some of the valid code words the symbols in the first sub-group are similar to the symbols in the second sub-group. For other valid code words the symbols in the first sub-group are different from the symbols in the second sub-group. The valid code words correspond to groups which represent (a) start of a data packet or block; (b) data/(c) a gap between groups of data; and (d) an idle state. The sequence of groups in the framing signal is monitored by means of a state machine.

Framing codes for high-speed parallel data buses

A method of testing data packets uses a program of selected microcode instructions of which at least one prescribes a comparison between a series of data patterns and a series of test patterns. Data patterns and test patterns are stored in dynamic random access memory. A first group of one of said series of patterns is read out and stored in temporary storage locations. A first group of the other of said series of patterns is read out and stored in temporary storage locations. Each of the patterns in the first group of the other series of patterns is compared, as it is stored, with a respective one of the stored patterns of the first series. The invention renders the testing of data packets more efficient.

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Dublin, Ireland

Mark A Hughes