Freescale Semiconductor,inc.

Freescale Semiconductors Inc.

Mark A Bennett

Xiaowei Ren

Wayne R Burger

Colin Kerr

Jeffrey Kevin Jones

Margaret A Szymanowski

Michele Lynn Miera

Electronic elements having an active device region and integrated passive device (IPD) region on a common substrate preferably include a composite dielectric region in the IPD region underlying the IPD to reduce electro-magnetic (E-M) coupling to the substrate. Mechanical stress created by plain dielectric regions and its deleterious affect on performance, manufacturing yield and occupied area may be avoided by providing electrically isolated inclusions in the composite dielectric region of a material having a thermal expansion coefficient (TEC) less than that of the dielectric material in the composite dielectric region. For silicon substrates, non-single crystal silicon is suitable for the inclusions and silicon oxide for the dielectric material. The inclusions preferably have a blade-like shape separated by and enclosed within the dielectric material.

Low loss substrate for integrated passive devices

Electronic elements having an active device region and bonding pad (BP) region on a common substrate desirably include a dielectric region underlying the BP to reduce the parasitic impedance of the BP and its interconnection as the electronic elements are scaled to higher power and/or operating frequency. Mechanical stress created by plain (e.g., oxide only) dielectric regions can adversely affect performance, manufacturing yield, pad-to-device proximity and occupied area. This can be avoided by providing a composite dielectric region having electrically isolated inclusions of a thermal expansion coefficient (TEC) less than that of the dielectric material in which they are embedded and/or closer to the substrate TEC. For silicon substrates, poly or amorphous silicon is suitable for the inclusions and silicon oxide for the dielectric material. The inclusions preferably have a blade-like shape separated by and enclosed within the dielectric material.

Electronic elements and devices with trench under bond pad feature

Electronic elements (&#x2033;) having an active device region () and integrated passive device (IPD) region () on a common substrate () preferably include a composite dielectric region (&#x2033;) in the IPD region underlying the IPD () to reduce electromagnetic (E-M) () coupling to the substrate (). Mechanical stress created by plain dielectric regions (') and its deleterious affect on performance, manufacturing yield and occupied area may be avoided by providing electrically isolated inclusions (&#x2033;) in the composite dielectric region (&#x2033;) of a material having a thermal expansion coefficient (TEC) less than that of the dielectric material (&#x2033;) in the composite dielectric region (&#x2033;). For silicon substrates (), non-single crystal silicon is suitable for the inclusions (&#x2033;) and silicon oxide for the dielectric material (&#x2033;). The inclusions (&#x2033;) preferably have a blade-like shape separated by and enclosed within the dielectric material (&#x2033;).

Electronic elements (&#x2033;) having an active device region () and bonding pad (BP) region () on a common substrate () desirably include a dielectric region underlying the BP () to reduce the parasitic impedance of the BP () and its interconnection () as the electronic elements (&#x2033;) are scaled to higher power and/or operating frequency. Mechanical stress created by plain (e.g., oxide only) dielectric regions (') can adversely affect performance, manufacturing yield, pad-to-device proximity and occupied area. This can be avoided by providing a composite dielectric region (&#x2033;) having electrically isolated inclusions (&#x2032;) of a thermal expansion coefficient (TEC) less than that of the dielectric material (&#x2033;) in which they are embedded and/or closer to the substrate () TEC. For silicon substrates (), poly or amorphous silicon is suitable for the inclusions (&#x2033;) and silicon oxide for the dielectric material (&#x2033;). The inclusions (&#x2033;) preferably have a blade-like shape separated by and enclosed within the dielectric material (&#x2033;).

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Glasgow, United Kingdom

Mark A Bennett