Stmicroelectronics (crolles 2) Sas

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Stmicroelectronics (research & Development) Limited

Université´ D'aix-Marseille

Marios Barlas

Laurent Grenouillet

Elisa Vianello

Bruce Rae

Raul Andres Bianchi

Philippe Blaise

Bastien Mamdy

Benoît Sklenard

Isobel Nicholson

Alexandre Lopez

Stephane Monfray

Emmanuel Josse

Jean-Michel Portal

Pascal Gouraud

Etienne Nowak

Xavier Federspiel

Kirill Shiianov

A device includes a first layer, having a copper track located therein. The first layer is covered with a second layer including a cavity. The cavity exposes at least a portion of the track. The portion is covered with a third layer of titanium nitride doped with silicon.

Electronic device

A phase change filter is formed by an arrangement of dots, wherein each dot is made of a phase change material. A heating layer of electrically conductive material extends under the arrangement of dots. Current passing through the heating layer changes the dots between two states to alter attenuation of light passing through the filter.

Planar cell nanoheater design and cell architecture for programmable phase change filters

A method is presented for manufacturing an insulated conductive via. The via crosses a first stack of layers to reach a first layer. A first cavity is formed partially extending into the first stack of layers. A second stack of layers is formed over the first stack of layers and in the first cavity. The second stack of layers includes an etch stop layer and an insulating layer. A second cavity is then formed extending completely through first and second stacks of layers to reach the first layer. An insulating liner then covers the walls and bottom of the second cavity. The insulating liner is then anisotropically etched, and the second cavity is filled by a conductive material forming the core of the via.

Via manufacturing method

The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.

Pixel with an improved quantum efficiency having a micro-lens and a diffractive structure

Pixel with an improved quantum efficiency

A resistive memory cell may be provided with a first electrode and a second electrode arranged on either side of a dielectric layer and facing an interface between a first region and a second region, The first and second region may have different compositions in terms of doping and/or dielectric constant, so as to confine the zone of reversible creation of a conductive filament at the interface.

Resistive memory with a switching zone between two dielectric regions having different doping and/or dielectric constants

A resistive non-volatile memory cell includes a first electrode, a second electrode and an oxide layer disposed between the first electrode and the second electrode, the memory cell being capable of reversibly switching between: &#x2014;a high resistance state obtained by applying a first bias voltage between the first electrode and the second electrode; and&#x2014;a low resistance state obtained by applying a second bias voltage between the first electrode and the second electrode; the oxide layer including a switching zone forming a conduction path prioritised for the current passing through the memory cell when the memory cell is in the low resistance state. The oxide layer includes a first zone doped with aluminium or silicon, the aluminium or silicon being present in the first zone with an atomic concentration that is selected so as to locate the switching zone outside the first zone.

Oxide-based resistive non-volatile memory cell and method for manufacturing same

A device for selecting a storage cell, includes a first electrode, a second electrode and an oxide layer disposed between the first electrode and the second electrode, wherein the oxide layer is doped with a first element from column IV of the periodic table.

Device for selecting a memory cell

The invention relates to a non-volatile memory that comprises selection transistors. Each selection transistor includes a layer of semiconductor material with a channel region and conduction electrodes, a gate stack including a gate electrode and a gate insulator, an isolation trench between the transistors, a storage structure of the RRAM type comprising a control electrode, and a dielectric layer formed under the control electrode and in the same material as the gate insulator, comprising a central part directly above the isolation trench and ends extending directly above conduction electrodes, and configured so as to form conducting filaments. The said storage structure and the said selection transistors are formed in the same pre-metallization layer.

Growing community of inventors

Grenoble, France

Marios Barlas