Maxlinear, Inc.

Mario Milicevic

Glenn Gulak

Ioannis Spyropoulos

A transmitter is configured to generate a DOCSIS signal for transmission onto a frequency-selective coaxial cable. The transmitter comprises a first reverse tilt filter circuit, a digital predistortion circuit, a forward tilt filter, a wideband equalizer, a second reverse tilt filter, and a power amplifier. The responses of the tilt filters may be set based on the frequency response of the frequency-selective coaxial cable to which the transmitter is intended to be coupled. The predistortion circuit may compensate for distortion introduced by circuitry of the transmitter. The equalizer circuit may be operable to compensate for undesired linear response of other circuitry of the transmitter.

Digital predistortion for a frequency-selective channel

A Low-Density Parity-Check (LDPC) decoder and a method for LDPC decoding are provided. The LDPC decoder receives a soft-decision input codeword block in which the probability of a bit being a '0' or a '1' is represented as a log-likelihood ratio (LLR). During LDPC decoding, a sequence of hardware logic units iteratively updates the soft-decision input codeword block until a valid codeword is found or a maximum number of decoding iterations is reached. Each hardware logic unit comprises a check node (CN) update logic unit and a variable node (VN) update logic unit. The CN update logic units are coupled via a closed CN path, and the VN update logic units are coupled via a closed VN path. Aspects of this LDPC decoder alleviate the global routing and energy efficiency challenges of traditional LDPC decoders, to enable multi-rate, multi-Gb/s decoding without compromising error correction performance in next-generation systems and future CMOS technology nodes.

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Carlsbad, CA, United States of America

Mario Milicevic