Stmicroelectronics S.r.l.

Mario Micciche

Antonino Conte

Rosario Roberto Grasso

Gianbattista Lo Giudice

Carmelo Ucciardello

Giovanni Matranga

Maria Giaquinta

Giampiero Sberno

Stefania Rinaldi

Alberto Jose Di Martino

Diego De Costantini

FrancescoNino Mammoliti

Carmine D'Alessandro

A method for managing a flash memory device including pages of memory cells is described. The memory device may be erasable at the page level, and the pages may include operative pages for storing operative values and service pages for storing information relating to the erasing of the operative pages. In response to a request to erase selected operative pages, the method may include determining a service page in use among the service pages according to service information stored in the service pages, verifying the presence a service page to be erased, and applying an erasing pulse to each service page to be erased. The method may also include writing an address of the operative pages into the service page in use, erasing the selected operative pages, and writing a completion indication of the erasing of the selected operative pages into the service page in use.

Managing of the erasing of operative pages of a flash memory device through service pages

A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.

DC-DC down-converter with time constant comparison regulation system

A bandgap voltage reference circuit for generating a bandgap voltage reference. An embodiment comprises a current generator controlled by a first driving voltage for generating a first current depending on the driving voltage, and a first reference circuit element coupled to the controlled current generator for receiving the first current and generating a first reference voltage in response to the first current. The circuit further comprises a second reference circuit element for receiving a second current corresponding to the first current; said second reference circuit element is adapted to generate a second reference voltage in response to the second current. The circuit further comprises an operational amplifier having a first input coupled to the first circuit element and a second input coupled to the second reference circuit element. The circuit also comprises a control circuit comprising first capacitive element and second capacitive element.

Circuit for generating a reference voltage

An embodiment of a circuit includes first and second branches, an amplifier, a compensation circuit, and a bias unit. The first and second branches are respectively operable to generate first and second currents. The amplifier has a first amplifier input node coupled to the first branch, a second amplifier input node coupled to the second branch, an amplifier output node coupled to the first and second branches, and a first compensation node. The compensation unit is operable to provide a first offset-compensation signal to the first compensation node. And the first bias unit is operable to provide first and second bias signals to the first and second input nodes, respectively, such that the amplifier is operable to cause the first current to approximately equal the second current.

Circuit for generating a reference voltage with compensation of the offset voltage

A sense-amplifier circuit includes: a comparison stage that compares a cell current that flows in a memory cell and through an associated bitline, with a reference current, for supplying an output signal indicating the state of the memory cell; and a precharging stage, which supplies, during a precharging step prior to the comparison step, a precharging current to the bitline so as to charge a capacitance thereof. The comparison stage includes a first comparison transistor and by a second comparison transistor, which are coupled in current-mirror configuration respectively to a first differential output and to a second differential output, through which a biasing current flows. The precharging stage diverts, during the precharging step, the biasing current towards the bitline as precharging current, and allows, during the comparison step, passage of part of the biasing current towards the first differential output, enabling operation of the current mirror.

Sense-amplifier circuit for non-volatile memories that operates at low supply voltages

A generator circuit generates a reference voltage on an output terminal connected to a matrix of non-volatile memory cells and includes a comparator positioned between a common node and the output terminal. The comparator has first and second input terminals and an output terminal suitable for supplying a compared voltage given by comparing first and second voltage values present on the first and second input terminals. The circuit includes a reference cell inserted between the common node and a first voltage reference. Advantageously, the reference cell comprises a floating gate with a contact terminal coupled to a biasing block, having an input terminal connected to the output terminal of the generator circuit and being suitable for periodically biasing the floating gate contact terminal at a biasing voltage of a second voltage reference.

Circuit and method for generating a reference voltage in memory devices having a non-volatile cell matrix

A charge pump system is provided that includes at least one first pump for generating a first working voltage, a second pump for generating a second working voltage, and a third pump for generating a third working voltage. The first pump is connected to an internal supply voltage reference that can having a limited value, and has an output terminal connected to the second and third pumps so as to supplying them with the first working voltage as their supply voltage. A method is also provided for managing the generation of voltages to be used with such a charge pump system.

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Agrigento, Italy

Mario Micciche