Stmicroelectronics S.r.l.

Mario Micchche'

Antonino Conte

Carmelo Ucciardello

Giovanni Matranga

Gianbattista Logiudice

De Costantini Diego

An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.

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Agrigento, Italy

Mario Micchche'