Qualcomm Incorporated

Qualcomm Mems Technologies, Inc.

Snaptrack Incorporated

Mario Francisco Velez

Jonghae Kim

Changhan Hobie Yun

Chengjie Zuo

Daeik Daniel Kim

David Francis Berdy

Niranjan Sunil Mudakatte

Je-Hsiung Lan

Robert Paul Mikulka

Matthew Michael Nowak

Chi Shun Lo

Shiqun Gu

Ravindra Vaman Shenoy

Xiangdong Zhang

Jon Lasiter

Donald William Kidwell, Jr

Yunfei Ma

Young Kyu Song

Xiaonan Zhang

Xiaoju Yu

Mohammad Ali Tassoudji

Ryan David Lane

Sang-June Park

Puay Hoe See

Kwan-Yu Lai

Francesco Carobolante

Evgeni Petrovich Gousev

John Hyunchul Hong

Wei-Chuan Chen

Milind Shah

Chin-Kwan Kim

Philip Jason Stephanou

Manuel Aldrete

Kai Liu

Paragkumar Ajaybhai Thadesar

Jong-Hoon Lee

Nosun Park

Jie Fu

Uei-Ming Jow

Rui Tang

Jitae Kim

Fifin Sweeney

Lawrence D Smith

Wesley Nathaniel Allen

Hrishikesh Vijaykumar Panchawagh

Edgar Schmidhammer

Kostadin Dimitrov Djordjev

Christian Hoffmann

David William Burns

Vladimir Aparin

Jeremy Darren Dunworth

Aristotele Hadjichristos

Jessica Liu Strohmann

Seong Heon Jeong

Houssam Jomaa

Peng Wang

Nicholas Ian Buchan

Rajneesh Kumar

Alireza Mohammadian

Victor Adrian Chiriac

Firas Sammoura

Siamak Fazelpour

Daniel Daeik Kim

Justin Phelps Black

Thomas Myers

Chin-Jen Tseng

Jorge Luis Rosales

Leonard Eugene Fennell

Damion B Gastelum

Uei-ming Jow

Stefan Leopold Hatzl

Laxminarayan Sharma

Jung Ho Yoon

Manuel Hofer

Francesco Carrara

Sanghoon Joo

Sun Yun

Thomas Andrew Myers

Rick Allen Wilcox

Jon Gregory Aday

Ryan Scott C Spring

Jiantao Zheng

Rodrigo Pacher Fernandes

Peter Bainschab

Je-Hsiung Jeffrey Lan

Milind P Shah

Aspects of the disclosure are directed to a bandpass filter including a first, second, third and fourth resonators, wherein the second and third resonators are in parallel, wherein the first resonator includes a first and second terminals, wherein the second resonator includes a second resonator top terminal and a second resonator bottom terminal, wherein the third resonator includes a third resonator top terminal and a third resonator bottom terminal, wherein the fourth resonator includes a third terminal and a fourth terminal; wherein the first terminal is coupled to the second resonator top terminal, wherein the second terminal is coupled to the third resonator top terminal, wherein the third terminal is coupled to the third resonator bottom terminal, wherein the fourth terminal is coupled to the second resonator bottom terminal; a first inductor coupled to the first and third terminals; and a second inductor coupled to the second and fourth terminals.

Wideband filter with resonators and inductors

A device that includes a region comprising a heat generating device, and an energy harvesting device coupled to the region comprising the heat generating device. The energy harvesting device includes a first thermal conductive layer, a thermoelectric generator (TEG) coupled to the first thermal conductive layer, and a second thermal conductive layer coupled the thermoelectric generator (TEG) such that the thermoelectric generator (TEG) is between the first thermal conductive layer and the second thermal conductive layer. In some implementations, the energy harvesting device includes an insulation layer.

Energy harvesting device for electronic devices

Disclosed is an inductor device including a first curved metal plate, a second curved metal plate below and substantially vertically aligned with the first curved metal plate, and a first elongated via vertically aligned between the first curved metal plate and the second curved metal plate, the first elongated via configured to conductively couple the first curved metal plate to the second curved metal plate and having an aspect ratio of a width to a height of the first elongated via of at least approximately 2 to 1.

High performance inductors

A fingerprint sensor device includes a sensor substrate, a plurality of sensor circuits over a first surface of the sensor substrate, and a transceiver layer located over the plurality of sensor circuits and the first surface of the sensor substrate. The transceiver layer includes a piezoelectric layer and a transceiver electrode positioned over the piezoelectric layer. The piezoelectric layer and the transceiver electrode are configured to generate one or more ultrasonic waves or to receive one or more ultrasonic waves. The fingerprint sensor device may include a cap coupled to the sensor substrate and a cavity formed between the cap and the sensor substrate. The cavity and the sensor substrate may form an acoustic barrier.

Fingerprint sensor device and methods thereof

An integrated radio frequency (RF) circuit combines complementary features of passive devices and acoustic filters and includes a first die, a second die, and a third die. The first die includes a substrate having one or more passive devices. The second die includes a first acoustic filter. The second die is stacked and coupled to a first surface of the first die. The third die includes a second acoustic filter. The third die is stacked and coupled to a second surface opposite the first surface of the first die.

Hybrid passive-on-glass (POG) acoustic filter

In conventional packaging strategies for mm wave applications, the size of the package is dictated by the antenna size, which is often much larger than the RFIC (radio frequency integrated circuit). Also, the operations are often limited to a single frequency which limits their utility. In addition, multiple addition build-up layers are required to provide the necessary separation between the antennas and ground layers. To address these issues, it is proposed to provide a device that includes an antenna package, an RFIC package, and an interconnect assembly between the antenna and the RFIC packages. The interconnect assembly may comprise a plurality of interconnects with high aspect ratios and configured to connect one or more antennas of the antenna package with an RFIC of the RFIC package. An air gap may be formed in between the antenna package and the RFIC package for performance improvement.

High aspect ratio interconnects in air gap of antenna package

An package and related methods are disclosed. The package may include an antenna, an insert made of low-loss material, and a mold, wherein the mold directly contacts and surrounds at least a portion of the insert, wherein the antenna is formed of conductive material disposed at least in part on a surface of the insert.

Antenna-on-package arrangements

Aspects of the present disclosure provide three-dimensional (3D) through-glass-via (TGV) inductors for use in electronic devices. In some embodiments, a first portion of a 3D TGV inductor may be formed in a first wafer and a second portion of a 3D TGV may be formed in a second wafer. The first portion and second portion may be bonded together in a bonded wafer device thereby forming a larger inductor occupying relatively little wafer space on the first and the second wafers.

Inductors formed with through glass vias

A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

Passive-on-glass (POG) device and method

A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.

Integration of through glass via (TGV) filter and acoustic filter

Base pads are spaced by a pitch on a support surface. Conducting members, optionally Cu or other metal pillars, extend up from the base pads to top pads. A top pad interconnector connects the top pads in a configuration establishing an inductor current path between the base pads.

3D pillar inductor

In an illustrative example, an apparatus includes a passive-on-glass (POG) device integrated within a glass substrate. The apparatus further includes a semiconductor die integrated within the glass substrate.

Glass substrate including passive-on-glass device and semiconductor die

An integrated device that includes a substrate, a first interconnect over the substrate and a second interconnect comprising a first portion and a second portion. The integrated device further comprising a first dielectric layer between the first interconnect and the first portion of the second interconnect such that the first interconnect vertically overlaps with the first dielectric layer and the first portion of the second interconnect. The integrated device also includes a second dielectric layer formed over the substrate. The first interconnect, the first dielectric layer and the first portion of the second interconnect are configured to operate as a capacitor. The first portion and the second portion of the second interconnect are configured to operate as an inductor.

Integrated device comprising a capacitor and inductor structure comprising a shared interconnect for a capacitor and an inductor

Apparatus implementing various structures to decrease the distance between two inductive elements for tuning an inductance with greater variability (a wider tuning range). One example integrated circuit (IC) package generally includes a laminate, a solder resist layer disposed on an upper surface of the laminate, and a semiconductor die disposed above the laminate and comprising a first inductor. At least a portion of a second inductor is disposed above a section of the solder resist layer, the first inductor at least partially overlaps the second inductor, and there is a gap between the first inductor and the second inductor.

Close proximity tunable inductive elements

Growing community of inventors

San Diego, CA, United States of America

Mario Francisco Velez