Applied Materials, Inc.

Mario Dave Silvetti

Kevin Griffin

Sanjeev Baluja

Christopher Dennis Bencher

Mandyam Sriram

Hari K Ponnekanti

Yuxiang May Wang

Bok Hoen Kim

Tsutomu Tanaka

Dmitry A Dzilno

Kenneth Brian Doering

Keiichi Tanaka

Hichem M'Saad

Mihaela A Balseanu

Joseph F AuBuchon

Muhannad Mustafa

Sudha S Rathi

Ian Scot Latchford

Sang H Ahn

Vijayabhaskara Venkatagiriyappa

Francis Kanyiri Mungai

Li-Qun Xia

Jeffrey C Hudgens

John C Forster

Gregory J Wilson

Sen-Hou Ko

Hui W Chen

Martin Jay Seamons

Lakshmanan Karuppiah

Dean C Hruzek

Satish Sundar

Allen L D'Ambra

Jeffrey Allen Brodine

Karthik Ramanathan

Ping Xu

Kenichi Ohno

Abhishek Chowdhury

Gerald John Alonzo

Alexander Viktorovich Garachtchenko

Lloyd M Berken

William P Laceky

William Nixon Taylor, Jr

Kuo-Shih Liu

Yufei Chen

Rakesh Ramadas

Zhi Xu

Sriharish Srinivasan

Nam Le

Adrian Blank

Miguel S Fung

Mike Murtagh

Ameeta Madhava

Srinivas Ramakrishna

Davood Khalili

Prudhvi R Chintalapati

Keebum Jung

Lei Zhu

Jyoti Prakash Deo

Ramana Veerasingam

Gang Chen

Emanuele Cappello

Yung-Cheng Hsu

Heaters having a body with having a top and bottom comprising pyrolytic boron nitride (PBN), a first heater electrode and a second heater electrode are described. The heater electrodes can be enclosed within an electrically insulating standoff and connected to separate busbars to provide power. Heater assemblies including one or more of the heaters and processing chambers including the heater assemblies are also described.

PBN heaters for ALD temperature uniformity

Pedestal heater radiators, pedestal assemblies including the pedestal heater radiators and methods of decreasing deposition non-uniformity are described. The pedestal heater radiator has a first radiator body and a second radiator body with different emissivities. The first radiator body and second radiator body are sized and positioned to decrease the heat loss differential between sides of the pedestal.

Apparatus and methods for fine planar non-uniformity improvement

Pedestal assemblies, purge rings for pedestal assemblies, and processing methods for increasing residence time of an edge purge gas in heated pedestal assemblies are described. Purge rings have an inner diameter face and an outer diameter face defining a thickness of the purge ring, a top surface and a bottom surface defining a height of the purge ring, and a thermal expansion feature. Purge rings comprise a plurality of apertures extending through the thickness and aligned circumferentially with a plurality of circumferentially spaced purge outlets in a substrate support.

Purge ring for pedestal assembly

Processing chambers with a plurality of processing stations and individual wafer support surfaces are described. The processing stations and wafer support surfaces are arranged so that there is an equal number of processing stations and heaters. An RF generator is connected to a first electrode in a first station and a second electrode in a second station. A bottom RF path is formed by a connection between a first support surface and a second support surface.

Paired dynamic parallel plate capacitively coupled plasmas

Processing chambers and methods to disrupt the boundary layer are described. The processing chamber includes a showerhead and a substrate support therein. The showerhead and the substrate support are spaced to have a process gap between them. In use, a boundary layer is formed adjacent to the substrate support or wafer surface. As the reaction occurs at the wafer surface, reaction products and byproduct are produced, resulting in reduced chemical utilization rate. The processing chamber and methods described disrupt the boundary layer by changing one or more process parameters (e.g., pressure, flow rate, time, process gap or temperature of fluid passing through the showerhead).

Apparatus and methods for improving chemical utilization rate in deposition process

Methods for modifying a susceptor having a silicon carbide (SiC) surface comprising exposing the silicon carbide surface (SiC) to an atmospheric plasma are described. The method increases the atomic oxygen content of the silicon carbide (SiC) surface.

Plasma induced modification of silicon carbide surface

Gas injector inserts having a wedge-shaped housing, at least one first slot and at least one second slot are described. The housing has a first opening in the back face that is in fluid communication with the first slot in the front face and a second opening in the back face that is in fluid communication with the second slot in the front face. Each of the first slot and the second slot has an elongate axis that extends from the inner peripheral end to the outer peripheral end of the housing. The gas injector insert is configured to provide a flow of gas through the first slots at supersonic velocity. Gas distribution assemblies and processing chambers including the gas injector inserts are described.

Gas distribution assembly for improved pump-purge and precursor delivery

Apparatus and methods for vacuum chucking a substrate to a susceptor. The susceptor comprises one or more angularly spaced pockets are positioned around a center axis of the susceptor, the one or more angularly spaced pockets having an inner pocket and an outer pocket. The susceptor can be configured as an intermediate chuck having one or more pucks positioned within the inner pocket or as a distributed chuck having one or more pucks positioned within the outer pocket. The one or more pucks has a center hole, at least one radial channel and at least one circular channel having chuck holes for vacuum chucking a substrate.

Susceptor wafer chucks for bowed wafers

Processing chambers with a plurality of processing stations and individual wafer support surfaces are described. The processing stations and wafer support surfaces are arranged so that there is an equal number of processing stations and heaters. An RF generator is connected to a first electrode in a first station and a second electrode in a second station. A bottom RF path is formed by a connection between the a first support surface and a second support surface.

Apparatus and methods for depositing and treating or etching a film are described. A batch processing chamber includes a plurality of processing regions with at least one plasma processing region. A low frequency bias generator is connected to a susceptor assembly to intermittently apply a low frequency bias to perform a directional treatment or etching the deposited film.

Geometrically selective deposition of dielectric films utilizing low frequency bias

Embodiments of the present invention relates to an apparatus and method for cleaning a substrate using a disk brush. One embodiment provides a substrate cleaner comprising a substrate chuck disposed in the processing volume, and a brush assembly disposed in the processing volume, wherein the brush assembly comprises a disk brush movably disposed opposing the substrate chuck, and a processing surface of the disk brush contacts a surface of the substrate on the substrate chuck.

Disk-brush cleaner module with fluid jet

Systems, apparatus and methods for transporting substrates between system components of an electronic device manufacturing system are provided. The systems and apparatus include an electrostatic end effector having a base, an electrode pair on the base, and spacer members for spacing the substrate from the electrode pairs to provide a gap between the electrode pair and the substrate. Methods of the invention as well as numerous other aspects are provided.

Electrostatic end effector apparatus, systems and methods

A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

Photolithography scheme using a silicon containing resist

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Morgan Hill, CA, United States of America

Mario Dave Silvetti