Motorola Corporation

Mario A Rivas

Michael J DeLuca

Walter L Davis

Allen David Hertz

Kenneth R Burch

David A Tribbey

Barry W Herold

Alain Charles Briancon

Richard Lionel Bennett

Dwight D Brooks

Omid Tahernia

Vincent B Deems

John T Puma

Leonard G DeBarros

A communication system in which a multipart analog message (480) is generated by a controller (112) by including an analog part delimiter (440) between successive independent analog parts (420, 431, 432, 433). The multipart analog message (480) is positioned within a synchronous protocol, in which a digital code is included to identify the position of the multipart analog message (480). The synchronous protocol is transmitted by a radio transmitter (202) and received by a selective call receiver (122). The selective call receiver (122) digitally decodes the position of the multipart analog message (480) and begins recovery of the multipart analog message (480) at the position. The selective call receiver (122) recovers the part delimiters (440) and uses them to identify the independent analog parts (420, 431, 432, 433). One of the independent parts, which is a audible response, is selected by the user and used to generate a response.

Multipart analog message and a response in a communication system

An electronic device (100) comprises a housing (222), a circuit supporting substrate (454, 456) within the housing and mechanically coupled thereto, and electronic circuitry (744, 746, 748, 750, 752) mechanically coupled to the circuit supporting substrate (454, 456). The electronic device (100) further comprises a mechanical shock isolation member (760, 762, 1312) within the housing (222) and mechanically coupled to the circuit supporting substrate (454, 456) for substantially increasing the natural mechanical frequency of vibration of the circuit supporting substrate (454, 456). The mechanical shock isolation member (760, 762, 1312) comprises an element (1313) having a planar surface (1315). The mechanical shock isolation member (760, 762, 1312) further comprises protuberances (1314) mechanically coupled to and extending perpendicularly from the planar surface (1315) for absorbing a tolerance build-up.

Tolerance accumulating circuit supporting mechanical shock isolator

An electronic device (100) includes a housing (222), a circuit supporting substrate (902) within the housing (222) and mechanically coupled thereto, and electronic circuitry (904) mechanically coupled to the circuit supporting substrate (902). A mechanical shock isolator (502) is located within the housing (222), and is mechanically coupled to the circuit supporting substrate (902) for substantially increasing the natural mechanical frequency of vibration of the circuit supporting substrate (902). The mechanical shock isolator (502) includes an electrically conductive structure (504) that is electrically coupled to the electronic circuitry (904). Additionally, a method is provided for sensing the integrity of an electrical loop formed between the electrically conductive structure (504) and the electronic circuitry (904).

Circuit supporting mechanical shock isolator for radio receiver

A paging receiver has a predetermined minimum operating voltage. A method of operation thereof comprises the step of determining the predetermined minimum operating voltage of the paging receiver operating the paging receiver at a plurality of different operating voltages until the paging receiver operates unsatisfactorily, and selecting the operating voltage of the paging receiver at a level greater than the unsatisfactory operating voltage.

Pager receiver with selective operating voltage and reduced power

A computing system has a predetermined minimum operating voltage. A method of operation thereof comprises the step of determining the predetermined minimum operating voltage of the system by operating the computing system at a plurality of different operating voltages until the computing system operates unsatisfactorily; and selecting the operating voltage of the system at a level greater than the unsatisfactory operating voltage.

Computing system with selective operating voltage and bus speed

A frequency synthesizer which has at least one programmably characterized phase lock loop circuit includes a buffer memory and an interface controller responsive to operational codes received from a central controller to direct transfer of data words for characterization of the phase lock loop circuit among the at least one phase lock loop circuit, the buffer memory, and the central controller. In one embodiment, the transfer of data words between the central controller and phase lock loop circuit or buffer memory are performed serially in accordance with a prespecified protocol and governed by a clock signal generated by the central controller. Data word transfers between the buffer memory and at least one phase lock loop circuit may also be performed serially in accordance with a prespecified protocol, but may be governed autonomously by an internal clock signal generated by the frequency synthesizer.

Frequency synthesizer with an interface controller and buffer memory

A timer which can be used to provide interrupt signals at predetermined but variable periods for multi-tasking microcomputers or serial data acquisition in pagers comprises a plurality of modulo counters. Each modulo counter has selectable clock inputs and has an output coupled via switches to a NOR gate and to the other modulo counters. Programmable configuring means control the switching means to configure the counters so as to produce desired outputs at the logic gate. The configuring means can also reset the modulus of the modulo counters to any desired value. Thus, the timer produces variable interrupt signals with little or no overhead processor time.

Timer architecture for multi-task computers and for serial data decoding

A paging receiver includes a nonvolatile memory which is readable for controlling the operation of the paging device and is capable of being partitioned into a plurality of regions. A protect means is also included for allowing modification to a selected region of the nonvolatile memory in response to an unlock signal. In a first embodiment, the unlock signal is externally applied to the paging receiver. In a second embodiment, the unlock signal is generated when a predetermined coded signal stored in the paging receiver matches a received coded signal. In a third embodiment, the protect means further includes a switch means to permit the selected region of memory to be modified while preventing other regions of memory to be modified.

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West Palm Beach, FL, United States of America

Mario A Rivas