International Business Machines Corporation

Globalfoundries Inc.

Samsung Electronics Co., Ltd.

Bay Zu Precision Co., Ltd

Marinus Hopstaken

Devendra K Sadana

Jeehwan Kim

Joel Pereira De Souza

Ghavam G Shahidi

Hemanth Jagannathan

Davood Shahrjerdi

Talia S Gershon

Dae-Gyu Park

Augustin J Hong

Bahman Hekmatshoar-Tabari

Stephen W Bedell

Shogo Mochizuki

Dechao Guo

Ruqiang Bao

Supratik Guha

John Albrecht Ott

Yun Seog Lee

Gen Tsutsui

Nestor Alexander Bojarczuk, Jr

Byungha Shin

Takashi Ando

Vijay Narayanan

Kevin K Chan

Anthony J Annunziata

Robert Daniel Clark

Seyoung Kim

Deborah A Neumayer

Dario Leonardo Goldfarb

Richard Alan Haight

Barry P Linder

Paul Charles Jamison

Robert L Bruce

David Brian Mitzi

Mahmoud M Khojasteh

John Rozen

Sebastian Ulrich Engelmann

Mark B Ritter

Hongwen Yan

Wei Wang

Jeong-Heon Park

Cory Wajda

Gert J Leusink

George Gabriel Totir

Chandrasekara Kothandaraman

Yohei Ogawa

Masanobu Hatanaka

Mark T Winkler

Steven Consiglio

Chien-Chih Huang

Junghyuk Lee

Masahiro Yamazaki

Yu-Wei Huang

Chih-Fu Tseng

Shintaro Aoyama

Kazuhiro Honda

A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.

Etch-resistant doped scavenging carbide electrodes

Techniques for interface charge reduction to improve performance of SiGe channel devices are provided. In one aspect, a method for reducing interface charge density (Dit) for a SiGe channel material includes: contacting the SiGe channel material with an Si-containing chemical precursor under conditions sufficient to form a thin continuous Si layer, e.g., less than 5 monolayers thick on a surface of the SiGe channel material which is optionally contacted with an n-dopant precursor; and depositing a gate dielectric on the SiGe channel material over the thin continuous Si layer, wherein the thin continuous Si layer by itself or in conjunction with n-dopant precursor passivates an interface between the SiGe channel material and the gate dielectric thereby reducing the Dit. A FET device and method for formation thereof are also provided.

Interface charge reduction for SiGe surface

A method of processing semiconductor material includes applying an organosulfur solution to a top surface of a semiconductor material, the organosulfur solution having at least one organosulfur compound. The at least one organosulfur compound has at least one sulfur atom double bonded to a carbon atom and a pH of not less than 8. An organosulfur solution may be applied at temperatures above 25&#xb0; C. to increase sulfur deposition rates and increase sulfur coverage on a surface of a semiconductor material.

Semiconductor processing method

A method and apparatus for manufacturing a nitrogen-doped CZTSSe layer for a solar cell is disclosed. A substrate is mounted in a vacuum chamber. A plurality of effusion cells are placed within the vacuum chamber in order to evaporate copper, zinc, tin, sulfur, and/or selenium to form elemental vapors in a region proximate the substrate. An RF-based nitrogen source delivers a nitrogen plasma in the region proximal to the substrate. The elemental vapors and the nitrogen plasma form a gas mixture in the region near the substrate, which then react at the substrate to form a CZTSSe absorber layer for a solar cell.

In situ nitrogen doping of co-evaporated copper-zinc-tin-sulfo-selenide by nitrogen plasma

A gas is ionized into a plasma. A compound of a dopant is mixed into the plasma, forming a mixed plasma. Using a semiconductor device fabrication system, a layer of III-V material is exposed to the mixed plasma to dope the layer with the dopant up to a depth in the layer, forming a shallow doped portion of the layer. The depth of the dopant is controlled by a second layer of the dopant formed at the shallow doped portion of the layer. The second layer is exposed to a solution, where the solution is prepared to erode the dopant in the second layer at a first rate. After an elapsed period, the solution is removed from the second layer, wherein the elapsed period is insufficient to erode a total depth of the layer and the shallow doped portion by more than a tolerance erosion amount.

Plasma shallow doping and wet removal of depth control cap

Techniques for achieving band gap grading in CZTS/Se absorber materials are provided. In one aspect, a method for creating band gap grading in a CZTS/Se absorber layer includes the steps of: providing a reservoir material containing Si or Ge; forming the CZTS/Se absorber layer on the reservoir material; and annealing the reservoir material and the CZTS/Se absorber layer under conditions sufficient to diffuse Si or Ge atoms from the reservoir material into the CZTS/Se absorber layer with a concentration gradient to create band gap grading in the CZTS/Se absorber layer. A photovoltaic device and method of forming the photovoltaic device are also provided.

Achieving band gap grading of CZTS and CZTSe materials

Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a doped germanium-free silicon base material. The buffer layer has a work function that falls within barrier energies of the transparent electrode and the p-type layer. An intrinsic layer and an n-type layer are formed on the p-type layer. Devices are also provided.

Buffer layer for high performing and low light degraded solar cells

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

Method of stabilizing hydrogenated amorphous silicon and amorphous hydrogenated silicon alloys

Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.

Magnetic tunnel junction encapsulation using hydrogenated amorphous semiconductor material

A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.

Resistive random access memory devices with extremely reactive contacts

A method for fabricating a photovoltaic device includes forming a film including titanium on a conductive layer formed on a substrate. An absorber layer is formed including a Cu&#x2014;Zn&#x2014;Sn containing chalcogenide compound with a kesterite structure of the formula: CuZnSn(SSe)wherein 0&#x2266;x&#x2266;1; 0&#x2266;y&#x2266;1; 0&#x2266;z&#x2266;1; &#x2212;1&#x2266;q&#x2266;1 (CZTS) on the film. The absorber layer is annealed to diffuse titanium therein and to recrystallize the CZTS material of the film. A buffer layer is formed on the absorber layer, and a transparent conductive layer is formed on the buffer layer.

Titanium incorporation into absorber layer for solar cell

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Carmel, NY, United States of America

Marinus Hopstaken