Cisco Technology, Inc.

Whittaker Corporation

Whittaker Communications Inc.

Marinica Rusu

Ihab A Jaser

Sharat C Prasad

Hiroshi Suzuki

Andreas V Bechtolsheim

Paul Frantz

Luca Della Chiesa

Stefano Binetti

Shankar Venkataraman

A method and system for conveying management information across a network are disclosed. The method includes generating an Ethernet packet comprising a converged data link header in place of an Ethernet preamble and transmitting the modified packet from a network element. The header is configured to provide support for network management.

Method and system for providing operations, administration, and maintenance capabilities in packet over optics networks

A method of processing Ethernet signals for transport in an optical network system is disclosed. The method includes encapsulating Ethernet frames into EFP frames comprising a length header, a converged data link header, and a data area, and mapping the EFP frames into byte synchronous paths. The converged data link header replaces an Ethernet preamble of the Ethernet packet.

Efficient framing procedure for variable length packets

A method for conveying management information across a network. The method includes receiving an Ethernet packet at a network element and modifying the packet by inserting a header in place of some or all of an unused portion of a preamble within the packet. The header is configured to provide support for network management. The method further includes transmitting the modified packet from the network element. The method may also include examining and updating the header at intermediate network elements and examining and replacing the header with the preamble at an egress network element.

A queue length measurement device that is comprised of a number of queues that are capable of holding data cells. A differential counter is coupled to each queue. The counter is incremented when a cell is written into the queue and decremented when a cell is read from the queue. An interval measurement device, coupled to the differential counter, generates a pulse to reset the counter at fixed intervals equivalent to n cells time (where n is the maximum number of cells the queue counter can measure). A multiplexer is coupled to the multiple differential counters. A transfer control circuit coupled to the interval measurement device selects the appropriate queue measurement to be output from the multiplexer to the other switch elements. A system and methodology provide for queue flow statistics and closed loop control of cell flow into the queue. A congestion control system is provided comprising a queue (having an input and an output, and capable of storing and outputting a plurality of data cells), an input processor (for coupling a plurality of data cells to the queue input), an output processor, an interval measurement device (generating a pulse at predetermined intervals), and differential queue length generation logic. The output processor, couples to the queue output, for receiving a plurality of data cells from the queue, which generates a queue change in size signal in response to determining for each of the predefined intervals of the difference between a present and a previous queue length.

Closed loop congestion control using a queue measurement system

An input processor recognizes and accepts a wide variety of protocols and formats. Queue management stores the uniform cells in a dual balanced bank memory system, which provides for utilizing an available bank of memory when the other bank of memory is in use, and otherwise balancing the use of the banks of memory, thereby maintaining equal free lists. Queue management apparatus and logic also ascertains and appends routing data to the stored data and transmits the data according to its priority.

Dual bank queue memory and queue control system

The present invention is directed to a hybrid packet/cell switching, linking, and control system and methodology for sharing a common internal cell format that supports multiple protocol operations to support both high speed Ethernet and ATM. The architecture is a shared memory common internal cell architecture (ATM is the preferred embodiment), providing capabilities that support multicast data traffic (which is specific in a LAN environment) and accommodates a large shared buffer and linked list queue set groupings to control reading and retrieving the cell and packet encapsulated cell data types to permit intercoupling all combinations of cross/hybrid switching. The new hybrid switch provides both a full non-blocking packet (e.g., Ethernet) switch having a plurality of ports (e.g., 32 @ 100 Mbps (full or half duplex) ports) and a full non-blocking cell (e.g., ATM) switch having a plurality of ports (e.g., 32 @ 155 Mbps ports). In one embodiment, one or more ports can be used internally on the board for SAR functions. The hybrid switch supports a variety of interfacing speeds and types (e.g., from 10 Mbps Ethernet to 622 Mbps ATM ports, either directly or by additional multiplexing functions), while supporting mixed operation (i.e., ATM and Ethernet) in the same switch. The mixed operation is performed at the queue level. Supporting applications like LAN (Local Area Network) at the switch level especially benefit from the segmentation and reassembly feature being an intrinsic part of the switch design.

Hybrid packet/cell switching, linking, and control system and

A queue length measurement device that is comprised of a number of queues that are capable of holding data cells. A differential counter is coupled to each queue. The counter is incremented when a cell is written into the queue and decremented when a cell is read from the queue. An interval measurement device is coupled to the differential counter. The interval measurement device generates a pulse to reset the counter at fixed intervals equivalent to n cells time (where n is the maximum number of cells the queue counter can measure). A multiplexer is coupled to the multiple differential counters. A transfer control circuit coupled to the interval measurement device selects the appropriate queue length to be output from the multiplexer to the other switch elements. A system and methodology are also provided to provide for queue flow statistics and closed loop control of cell flow into the queue. A queue measurement apparatus is provided for measuring a data queue size. The apparatus is comprised of a queue, an interval measurement device and differential queue length logic. The queue is capable of holding a plurality of data cells. The interval measurement device generates a pulse at predetermined intervals. The differential queue length generation logic is coupled to the queue and the interval measurement device, and generates a queue size output representative of the measurement of the change in queue size during the predefined interval. The queue size output represents the difference between a present and a previous queue length.

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Sunnyvale, CA, United States of America

Marinica Rusu