Sandisk Technologies Inc.

Marika Gunji-Yoneoka

Kazuya Tokunaga

Tuan Duc Pham

Hiroyuki Kinoshita

Murshed Chowdhury

Tadashi Nakamura

Jayavel Pachamuthu

Naoki Takeguchi

Jin Liu

Atsushi Suyama

Matthias Baenninger

Jiyin Xu

Chan Park

Jong Sun Sel

Raghuveer S Makala

Hiroyuki Ogawa

James K Kai

Rahul Sharangpani

Jongsun Sel

Kensuke Yamaguchi

Hiro Kinoshita

Kazutaka Yoshizawa

Shigehisa Inoue

Dai Iwata

Tomoyuki Obu

Yasuaki Yonemochi

Daewung Kang

Tsuyoshi Hada

Tomohiro Oginoe

Luckshitha Suriyasena Liyanage

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A memory opening is formed through the alternating stack. A memory film is formed in the memory opening. The memory film includes an opening at a bottom portion. A connection strap is formed by performing a selective semiconductor deposition process that grows a strap semiconductor material from a physically exposed surface of an underlying semiconductor material portion through the opening. A vertical semiconductor channel is formed on an inner sidewall of the memory film by non-selectively depositing a semiconductor channel material. The connection strap provides an electrical connection between the underlying semiconductor material portion and the vertical semiconductor channel through the opening in the memory film. The sacrificial material layers are then replaced with electrically conductive layers.

Three-dimensional memory device containing a vertical semiconductor channel containing a connection strap and method of making the same

An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.

Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same

An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

Three-dimensional memory device having epitaxial germanium-containing vertical channel and method of making thereof

Undesirable metal contamination from a selective metal deposition process can be minimized or eliminated by employing a first material layer on a bevel and a back side of a substrate, while providing a second material layer only on a front side of the substrate. The first material layer and the second material layer are selected such that a selective deposition process of a metal material provides a metal material portion only on the second material layer, while no deposition occurs on the first material layer or isolated islands of the metal material are formed on the first material layer. Any residual metal material can be removed from the bevel and the back side by a wet etch to reduce or prevent metal contamination from the deposited metal material.

Method of selectively depositing floating gate material in a memory device

Air gaps are formed between bit lines by etching to remove sacrificial material from between bit lines. Bit lines are protected from etch damage. Sacrificial material may be selectively oxidized prior to deposition of bit line metal so that protective oxide lies along sides of bit lines during etch. Portions of protective material may be selectively formed on tops of bit lines prior to etching sacrificial material.

Air gap formation between bit lines with side protection

Air gap formation between bit lines with top protection

A NAND flash memory chip is made by forming sacrificial control gate structures and sacrificial select structures, and subsequently replacing these sacrificial structures with metal. Filler structures are formed between sacrificial control gate structures and are subsequently removed to form air gaps between neighboring control gate lines and between floating gates.

Full metal gate replacement process for NAND flash memory

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Sunnyvale, CA, United States of America

Marika Gunji-Yoneoka