Intel Corporation

Mariano Tepper

Dipanjan Sengupta

Javier Sebastian Turek

Jawad Basit Khan

Theodore L Willke

Chetan Chauhan

Sourabh Dongaonkar

Richard L Coulson

Javier Felip Leon

Vy Vo

Rajesh Sundaram

Ignacio Javier Alvarez

David Israel Gonzalez Aguirre

Sandeep K Guliani

Marcos Emanuel Carranza

Javier Perez-Ramirez

Cesar Martinez-Spessot

Mateo Guzman

Dario Oliver

Rita H Wouhaybi

Bryn Keller

Nesreen K Ahmed

Mihai Capota

Technologies for performing random sparse lifting and Procrustean orthogonal sparse hashing using column read-enabled memory include a device that has a memory that is column addressable and circuitry connected to the memory. The circuitry is configured to add a set of input data vectors to the memory as a set of binary dimensionally expanded vectors, including multiplying each input data vector with a projection matrix. The circuitry is also configured to produce a search hash code from a search data vector, including multiplying the search data vector with the projection matrix. Further, the circuitry is configured to determine a Hamming distance between the search hash code and each of the binary dimensionally expanded vectors.

Technologies for performing sparse lifting and procrustean orthogonal sparse hashing using column read-enabled memory

Systems, apparatuses and methods may provide for technology that identifies a cognitive space that is to be a compressed representation of activations of a neural network, maps a plurality of activations of the neural network to a cognitive initial point and a cognitive destination point in the cognitive space and generates a first cognitive trajectory through the cognitive space, wherein the first cognitive trajectory traverses the cognitive space from the cognitive initial point to the cognitive destination point.

Neural network verification based on cognitive trajectories

An example system includes memory; a central processing unit (CPU) to execute first operations; in-memory execution circuitry in the memory; and detector software to cause offloading of second operations to the in-memory execution circuitry, the in-memory execution circuitry to execute the second operations in parallel with the CPU executing the first operations.

Technology to learn and offload common patterns of memory access and computation

Technologies for refining stochastic similarity search candidates include a device having a memory that is column addressable and circuitry connected to the memory. The circuitry is configured to add a set of input data vectors to the memory as a set of binary dimensionally expanded vectors, including multiplying each input data vector with a projection matrix. The circuitry is also configured to produce a search hash code from a search data vector, including multiplying the search data vector with the projection matrix. Additionally, the circuitry is configured to identify a result set of the binary dimensionally expanded vectors as a function of a Hamming distance of each binary dimensionally expanded vector from the search hash code and determine, from the result set, a refined result set as a function of a similarity measure in an original input space of the input data vectors.

Technologies for refining stochastic similarity search candidates

Systems, apparatuses and methods may provide for technology that generates, via a first neural network such as a grid network, a first vector representing a prediction of future behavior of an autonomous vehicle based on a current vehicle position and a vehicle velocity. The technology may also generate, via a second neural network such as an obstacle network, a second vector representing a prediction of future behavior of an external obstacle based on a current obstacle position and an obstacle velocity, and determine, via a third neural network such as a place network, a future trajectory for the vehicle based on the first vector and the second vector, the future trajectory representing a sequence of planned future behaviors for the vehicle. The technology may also issue actuation commands to navigate the autonomous vehicle based on the future trajectory for the vehicle.

Technology to generalize safe driving experiences for automated vehicle behavior prediction

Systems, apparatuses and methods may provide for technology that generates a dependence graph based on a plurality of intermediate representation (IR) code instructions associated with a compiled program code, generates a set of graph embedding vectors based on the plurality of IR code instructions, and determines, via a neural network, one of an analysis of the compiled program code or an enhancement of the program code based on the dependence graph and the set of graph embedding vectors. The technology may provide a graph attention neural network that includes a recurrent block and at least one task-specific neural network layer, the recurrent block including a graph attention layer and a transition function. The technology may also apply dynamic per-position recurrence-halting to determine a number of recurring steps for each position in the recurrent block based on adaptive computation time.

System to analyze and enhance software based on graph attention networks

Systems, apparatuses and methods may provide for origination camera technology that generates a cell representation of a local space associated with an origination camera in a multicast domain, predicts that an object in the local space will exit the local space and enter one or more adjacent spaces associated with additional cameras in the multicast domain, and sends the cell representation and a trajectory of the object to the additional cameras before the object exits the local space. Additionally, transition camera technology may generate a leader election message based on a multicasted trajectory of an object and a predicted trajectory of the object, send the leader election message from a transition camera to one or more additional cameras in a multicast domain, and track the object in the local space in response to a leader notification message.

Object tracking technology based on cognitive representation of a location in space

Technologies for performing stochastic similarity searches in an online clustering space include a device having a column addressable memory and circuitry. The circuitry is configured to determine a Hamming distance from a binary dimensionally expanded vector to each cluster of a set of clusters of binary dimensionally expanded vectors in the memory, identify the cluster having the smallest Hamming distance from the binary dimensionally expanded vector, determine whether the identified cluster satisfies a target size, and add or delete, in response to a determination that the identified cluster does not satisfy the target size, the binary dimensionally expanded vector to or from the identified cluster.

Technologies for performing stochastic similarity searches in an online clustering space

Systems, apparatuses and methods may provide for technology that detects an unidentified individual at a first location along a trajectory in a scene based on a video feed of the scene, wherein the video feed is to be associated with a stationary camera, and selects a non-stationary camera from a plurality of non-stationary cameras based on the trajectory and one or more settings of the selected non-stationary camera. The technology may also automatically instruct the selected non-stationary camera to adjust at least one of the one or more settings, capture a face of the individual at a second location along the trajectory, and identify the unidentified individual based on the captured face of the unidentified individual.

Camera orchestration technology to improve the automated identification of individuals

Systems, apparatuses and methods may store a plurality of classes that represent a plurality of clusters in a cache. Each of the classes represents a group of the plurality of clusters and the plurality of clusters is in a first data format. The systems, apparatuses and methods further modify input data from a second data format to the first data format and conduct a similarity search based on the input data in the first data format to assign the input data to at least one class of the classes.

Large-scale similarity search with on-chip cache

Technologies for tuning performance and/or accuracy of similarity search using stochastic associative memories (SAM). Under a first subsampling approach, columns associated with set bits in a search key comprising a binary bit vector are subsampled. Matching set bits for the subsampled columns are aggregated on a row-wise basis to generate similarity scores, which are then ranked. A similar scheme is applied for all the columns with set bits in the search key and the results for top ranked rows are compared to evaluate a tradeoff between throughput boost versus lost accuracy. A second approach called continuous column read, and iterative approach is employed that continuously scores the rows as each new column read is complete. The similarity scores for an N-1 and Nth-1 iteration are ranked, a rank correlation is calculated, and a determination is made to whether the rank correlation meets or exceeds a threshold.

Technologies for tuning performance and/or accuracy of similarity search using stochastic associative memories

Systems, apparatuses and methods may provide for technology that recognizes, via a neural network, a pattern of memory access and compute instructions based on an input set of machine instructions, determines, via a neural network, a sequence of instructions to be offloaded for execution by the secondary computing device based on the recognized pattern of memory access and compute instructions, and translates the sequence of instructions to be offloaded from instructions executable by a central processing unit (CPU) into instructions executable by the secondary computing device.

Technologies for column reads for clustered data include a device having a column-addressable memory and circuitry connected to the memory. The column-addressable memory includes multiple dies. The circuitry may be configured to determine multiple die offsets based on a logical column number of the data cluster, determine a base address based on the logical column number, program the dies with the die offsets. The circuitry is further to read logical column data from the column-addressable memory. To read the data, each die adds the corresponding die offset to the base address. The column-addressable memory may include multiple command/address buses. The circuitry may determine a starting address for each of multiple logical columns and issue a column read for each starting address via a corresponding command/address bus. Other embodiments are described and claimed.

Technologies for performant column read operations on clustered data in a dimm architecture

Technologies for media management for providing column data layouts for clustered data include a device having a column-addressable memory and circuitry connected to the memory. The circuitry is configured to store a data cluster of a logical matrix in the column-addressable memory with a column-based format and to read a logical column of the data cluster from the column-addressable memory with a column read operation. Reading the logical column may include reading logical column data diagonally from the column-address memory, including reading from the data cluster and a duplicate copy of the data cluster. Reading the logical column may include reading from multiple complementary logical columns. Reading the logical column may include reading logical column data diagonally with a modulo counter. The column data may bread from a partition of the column-address memory selected based on the logical column number. Other embodiments are described and claimed.

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Portland, OR, United States of America

Mariano Tepper