Kyocera Avx Components Corporation

Avx Corporation

Marianne Berolini

Jeffrey A Horn

Michael W Kirk

Richard C VanAlstine

Palaniappan Ravindranathan

Kwang Choi

Andrew Paul Ritter

Cory Nelson

Jonathan C Herr

Jeffrey Cain

Seth Fuller

Alma Iris Cordova

Hector Fuentes

Bryan R Seither

John L Galvagni

Gheorghe Korony

John Mruz

Jeff Borgman

Robert Grossbach

Richad C VanAlstine

Kimberly L VanAlstine

A surface mount component can include a monolithic substrate, an input terminal, an output terminal, and a DC bias terminal. Each terminal can be formed over the monolithic substrate. A conductive trace can be formed over a surface of the monolithic substrate included in a signal path between the input terminal and the output terminal. A thin-film resistor can be connected in a DC bias path between the DC bias terminal and the signal path. The DC bias path can have, at one or more locations along the DC bias path between the DC bias terminal and the signal path, a cross-sectional area in a plane that is perpendicular to the surface of the monolithic substrate. The cross-sectional area of the DC bias path can be less than about 1,000 square microns.

Surface mount radiofrequency component

The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

Multilayer ceramic capacitor including conductive vias

The present invention is directed to a multilayer ceramic capacitor. The multilayer ceramic capacitor has a first end and a second end that is spaced apart from the first end in a longitudinal direction that is perpendicular to a lateral direction wherein the lateral direction and longitudinal direction are each perpendicular to a Z-direction. The multilayer ceramic capacitor comprises a monolithic body comprising a plurality of dielectric layers and a plurality of electrode layers parallel with the lateral direction. At least one electrode layer includes a first electrode comprising a connecting portion and a central portion extending from the connecting portion in the longitudinal direction wherein the central portion includes a Z-directional edge and the connecting portion includes an edge extending in both the longitudinal direction and the Z-direction and wherein the Z-directional edge of the central portion forms a first angle of from greater than 90° to less than 180° with the edge of the connecting portion. A first external termination disposed along the first end and a second external termination disposed along the second end.

Multilayer ceramic capacitor

A broadband multilayer ceramic capacitor can include at least one active electrode layer including a first active electrode and a second active electrode. The first active electrode can have a central portion extending away from a base portion in a longitudinal direction. The second active electrode can include at least one arm extending away from a base portion towards the first end and overlapping the central portion of the first active electrode. A first shield electrode in a shield electrode region can have a central portion extending from a base portion. A second shield electrode can include an arm overlapping the central portion of the first shield electrode in the longitudinal direction. The shield electrode region can be spaced apart from the active electrode region by a shield-to-active distance that is greater than an active electrode spacing distance between respective active electrodes of the plurality of active electrodes.

Multilayer ceramic capacitor having ultra-broadband performance

A heat sink component can include a body including a thermally conductive material that is electrically non-conductive, a lower conductive layer formed over a bottom surface of the body and electrically connected with the ground plane layer, and an upper conductive layer formed over a top surface of the body. The heat sink component can have a length in an X-direction that is parallel with the top surface of the body and a thickness in a direction perpendicular to the top surface. A ratio of the length to the thickness can be greater than about 7.

Embeddable electrically insulating thermal connector and circuit board including the same

An integrated component may include a multilayer capacitor include a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The integrated component may include a discrete varistor comprising a first external varistor termination connected with the first active termination and a second external varistor termination connected with the second active termination of the multilayer capacitor.

Integrated component including a capacitor and discrete varistor

A varistor can include a monolithic body including a plurality of dielectric layers stacked in a Z-direction that is perpendicular to a longitudinal direction. The monolithic body can have a first end and a second end that is spaced apart from the first end in the longitudinal direction. A first external terminal can be disposed along the first end. A second external terminal can be disposed along the second end. A first plurality of electrodes can be connected with the first external terminal and can extend from the first end towards the second end of the monolithic body. A second plurality of electrodes can be connected with the second external terminal and can extend from the second end towards the first end of the monolithic body. At least one of the first external terminal or the second external terminal can include a conductive polymeric composition.

Varistor having flexible terminations

A filter assembly is disclosed that includes a monolithic filter having a surface and a heat sink coupled to the surface of the monolithic filter. The heat sink includes a layer of thermally conductive material that can have a thickness greater than about 0.02 mm. The heat sink may provide electrical shielding for the monolithic filter. In some embodiments, the filter assembly may include an organic dielectric material, such as liquid crystalline polymer or polyphenyl ether. In some embodiments, the filter assembly may include an additional monolithic filter.

High power surface mount filter

A low inductance component may include a multilayer, monolithic device including a first active termination, a second active termination, at least one ground termination, and a pair of capacitors connected in series between the first active termination and the second active termination. The lead(s) may be coupled with the first active termination, second active termination, and/or the at least one ground termination. The lead(s) may have respective length(s) and maximum width(s). A ratio of the length(s) to the respective maximum width(s) of the lead(s) may be less than about 20.

Low inductance component

A broadband multilayer ceramic capacitor may include a first external terminal and a second external terminal. A bottom portion of the first external terminal may be spaced apart from a bottom portion of the second external terminal by a bottom external terminal spacing distance. A first active electrode layer may include a first active electrode connected with the first external terminal and a second active electrode connected with the second external terminal and co-planar with the first electrode. A second active electrode layer may include a third active electrode connected to the first external terminal and a fourth active electrode connected to the second external terminal and co-planar with the fourth electrode. The first active electrode may overlap the fourth active electrode in the longitudinal direction. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be greater than about 4.

A varistor array can include a monolithic body including a plurality of dielectric layers. A first varistor can be formed in the monolithic body. The first varistor can include a first external terminal on a first end of the monolithic body, a first plurality of electrodes connected with the first external terminal, a second external terminal on a second end of the monolithic body, and a second plurality of electrodes connected with the second external terminal. The second plurality of electrodes can be interleaved with the first plurality of electrodes and can overlap the first plurality of electrodes at an overlapping area that is insensitive to a relative misalignment between the first plurality of electrodes and the second plurality of electrodes when the misalignment is less than a threshold. A second varistor can be formed in the monolithic body that is distinct from the first varistor.

Varistor array including matched varistors

A multilayer ceramic capacitor may include a monolithic body including a plurality of dielectric layers and a plurality of electrode regions. The plurality of electrode regions can include a dielectric region, an active electrode region, and a shield electrode region. The active electrode region may be located between the dielectric region and the shield electrode region in a Z-direction. The dielectric region may extend from the active electrode region to the top surface of the broadband multilayer ceramic capacitor. The capacitor may include a plurality of active electrodes arranged within the active electrode region and at least one shield electrode arranged within the shield electrode region. The dielectric region may be free of electrode layers that extend greater than 25% of a length of the capacitor. A ratio of a capacitor thickness to a thickness of the dielectric region may be less than about 20.

The present invention is directed to a multilayer ceramic capacitor that includes a plurality of active electrodes and at least one shield electrode that are each arranged within a monolithic body and parallel with a longitudinal direction. The capacitor may exhibit a first insertion loss value at a test frequency, which may be greater than about 2 GHz, in a first orientation relative to the mounting surface. The capacitor may exhibit a second insertion loss value at about the test frequency in a second orientation relative to the mounting surface and the capacitor is rotated 90 degrees or more about the longitudinal direction with respect to the first orientation. The longitudinal direction of the capacitor may be parallel with the mounting surface in each of the first and second orientations. The second insertion loss value may differ from the first insertion loss value by at least about 0.3 dB.

The present invention is directed to a multilayer ceramic capacitor. A plurality of active electrodes may be arranged within a monolithic body of the capacitor and parallel with a longitudinal direction. A first shield electrode may be arranged within the monolithic body and parallel with the longitudinal direction. The first shield electrode may be connected with a first external terminal. The first shield electrode may have a first longitudinal edge and a second longitudinal edge that are each aligned with the lateral direction and face away from the first external terminal. The second longitudinal edge may be offset in the longitudinal direction from the first longitudinal edge by a shield electrode offset distance. A second shield electrode may be connected with a second external terminal. The second shield electrode may be approximately aligned with the first shield electrode in the Z-direction.

A high frequency multilayer filter may include a plurality of dielectric layers and a signal path having an input and an output. The multilayer filter may include an inductor including a conductive layer formed over a first dielectric layer. The inductor may be electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground. The multilayer filter may include a capacitor including a first electrode and a second electrode that is separated from the first electrode by a second dielectric layer. The multilayer filter has a characteristic frequency that is greater than about 6 GHz.

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Greenville, SC, United States of America

Marianne Berolini