Reshape, Inc.

Margie Levine

Paul Kingsley Rodman

Peter Dahl

Byron Dickinson

Jagat B Patel

An abutted-pin hierarchical physical design process is described. The abutted-pin hierarchical physical design provides solutions to the problems of the traditional hierarchical physical design and provides additional advantages and benefits. In particular, the abutted-pin hierarchical physical design does not have channels. Moreover, in the abutted-pin hierarchical physical design, components of the top-level are merged into the block-level so that the top-level netlist is reduced significantly.

Optimization of the top level in abutted-pin hierarchical physical design

Optimization of abutted-pin hierarchical physical design

Facilitating press operation in abutted-pin hierarchical physical design

Facilitating verification in abutted-pin hierarchical physical design

A method and system for automatically generating low level design tool commands as dependency graphs from abstracted high level physical design stages. The novel system inputs names of blocks of a hierarchical integrated circuit. Each block name has associated with it certain variables, stages and conditional statements. The stages represent a set of linked physical design processes that are to be executed on the block. Stages can be dependent on other stages and therefore are executed in-order on the block depending on how they are linked in the input set. The system automatically generates, from the input set, a dependency graph for each block. The dependency graph includes a large volume of nodes with associated parameters and options. Each node includes one or more low level program commands (&ldquo;tasks&rdquo;) for directing a number of physical design tools, e.g., programs, to perform various functions with respect to the block. Each node can receive input and generate an output. If the input to a particular node has not been altered, e.g., since the last time the graphs were executed, then that node is not executed in the current run. Dependency graphs that are not data dependent can be executed in parallel. If the input set is altered, a new set of dependency graphs can automatically be generated. By grouping the physical design operations into stages, the novel system allows the user to abstract the problem of dealing with large numbers of physical design tasks into the more manageable problem of dealing with high level &ldquo;stages&rdquo; in the physical design process.

Method and system for automatically generating low level program commands as dependency graphs from high level physical design stages

A method for implementing a user interface for performing physical design operations on an integrated circuit netlist. The method includes accessing an input file containing identifications of a plurality of blocks of cells of the integrated circuit netlist, each block representing circuit components to be realized in physical form. A view of the plurality blocks is presented to a user, the view provided by a computer display. Attach points are defined for each block. Connections for the blocks are defined by graphically linking the attach points of the respective blocks. The input file is updated in accordance with the defined connections.

Method and system for implementing a graphical user interface for defining and linking multiple attach points for multiple blocks of an integrated circuit netlist

A method for implementing a user interface for performing physical design operations on an integrated circuit netlist. The method includes accessing an input file and parsing the input file to identify elements within the netlist matching corresponding elements within a first library file. At least one element within the netlist is identified that does not have a corresponding element within the first library file. A modifiable element corresponding to the at least one element is stored within a second library file. A subsequent occurrence of the at least one element is matched to the modifiable element in the second library file. The parsing of the input file of the integrated circuit netlist is completed and a build of the integrated circuit netlist is then completed based on the parsed input file and specifications stored in the first or second library files.

Method and system for maintaining element abstracts of an integrated circuit netlist using a master library file and modifiable master library file

A method for implementing a user interface for performing physical design operations on an integrated circuit netlist. The method includes accessing vertical and horizontal dimensions of an area of an integrated circuit netlist and accessing a grid for power and ground lines of the integrated circuit netlist. A view is presented of the grid to a user by a computer display. A plurality of blocks of cells of the integrated circuit netlist are accessed, wherein each block represents circuit components to be realized in physical form. The dimensions of the plurality of blocks to the grid such that the dimensions of the blocks align with the grid.

Method and system for implementing a user interface for performing physical design operations on an integrated circuit netlist

A method and system for implementing a user interface for performing physical design operations on an integrated circuit netlist. The method includes the step of accessing vertical and horizontal dimensions of an area of an integrated circuit netlist. A grid for power and ground lines of the integrated circuit netlist is then accessed. A view of the grid is presented to a user, wherein the view is provided by a computer display. A plurality of blocks of cells of the integrated circuit netlist are accessed, with each block representing circuit components to be realized in physical form. The dimensions of the plurality of blocks are snapped to the grid such that the dimensions of the blocks align with the grid.

Method and system for implementing a graphical user interface for depicting loose fly line interconnections between multiple blocks of an integrated circuit netlist

Growing community of inventors

Menlo Park, CA, United States of America

Margie Levine