Siemens Aktiengesellschaft

Infineon Technologies Ag

Margarete Deckers

Markus Zundel

Uwe Schmalzbauer

Joachim Dathe

Hansjoerg Reichert

Lothar Musiol

Ludwig Scharf

Christian Feuerbaum

Klaus-Jurgen Schoepf

Rainer Zanner

Felix Buth

Hans-Jörg Reichert

A transistor includes: gate electrodes and field electrodes, wherein in each case one gate electrode and one field electrode are arranged one above another in a vertical direction in a common trench of a semiconductor body; a gate pad to which the gate electrodes are connected; and a source metallization arranged above the semiconductor body. The field electrodes of a first group include at least one contact section. The at least one contact section is arranged between two sections of a gate electrode arranged in the same trench and is connected to the source metallization. The two sections of the gate electrode are separated from one another in a region of the contact section. At least one of the two sections of the gate electrode arranged in the same trench is electrically connected to a gate electrode arranged in a further trench by way of a gate connecting electrode.

Transistor component having gate electrodes and field electrodes

A method and an apparatus for producing a chip-substrate connection by alloying or brazing, using a solder containing two or more components with at least two metal-containing constituents X and Y. The first constituent X contains in particular gold or a similar precious metal, and the second constituent Y being consumed in the soldering operation by reacting or being dissolved in the materials or layers which are to be joined. The solder has a hypereutectic concentration of the second constituent Y. The invention furthermore relates to a solder for the production of a chip-substrate connection, and to a semiconductor component with a semiconductor chip which is secured to a substrate by alloying or brazing.

Method for producing a chip-substrate connection

An integratable circuit configuration for stabilizing an operating point of a transistor by negative feedback includes first, second, third and fourth terminals. The fourth terminal is connected to a fixed ground potential, and the first and fourth terminals have a supply voltage source connected therebetween. A first transistor to be stabilized by negative feedback has a collector connected to the second terminal, an emitter connected to the fourth terminal, and a base connected to the third terminal. A second transistor has an emitter connected to the second terminal, a collector connected to the third terminal, and a base. A first resistor is connected between the first terminal and the second terminal. A second resistor is connected between the base of the second transistor and the fourth terminal. A series circuit has at least one first diode and one second diode and is connected between the first terminal and the base of the second transistor.

Integratable circuit configuration for stabilizing the operating current

A sucking electrode for shortening the turn-off time in a semiconductor component includes a diffusion zone of the sucking electrode, a zone adjoining the diffusion zone of the sucking electrode defining a junction therebetween, and a metal short-circuit disposed between the diffusion zone of the sucking electrode and the zone adjoining the diffusion zone of the sucking electrode. The diffusion zone of the sucking electrode is disposed inside the zone adjoining the diffusion zone of the sucking electrode. At least a portion of the junction between the diffusion zone of the sucking electrode and the zone adjoining the diffusion zone of the sucking electrode is free of metal plating.

Sucking electrode for shortening the turn-off time in a semiconductor

In a process for the stabilization of a PN junction an oxide layer (12) is produced on a semiconductor substrate (11), and above this layer a nitride layer (13) is also produced. The oxide layer (12) is wet-chemically etched following the formation and etching of the nitride layer (13). Following the wet chemical etching of the oxide layer (12), the overlapping nitride (13) is re-etched. Dopant implantation takes place in the wet-chemically-etched region. This then is followed by a diffusion. A process of this type achieves high electrical stability for an electronic component. Thereupon, the photoresist (14) or any other type of layer covering the nitride (13) is removed.

Growing community of inventors

Munich, Germany

Margarete Deckers