Ati Technologies Ulc

Advanced Micro Devices Corporation

Marcus Ng

Oleg Drapkin

Grigori Temkine

Arvind Bomdica

Richard W Fung

Ming L So

Kevin Yikai Liang

Siji Menokki Kandiyil

Samu Suryanarayana

Jason J Mangattur

A low power biasing circuit for powering up split-rail electronic circuits includes an intermediate voltage generator at each pad which is supplied by a temporary supply voltage to generate a temporary intermediate voltage only when a power signal indicates that all external voltage rails are not safe, thereby reducing power consumption.

Low power implementation to allow for high potential rails to come up in any order

An integrated circuit is capable of controlling a communication signal by using power ramp controlled communication buffer logic to generate an outgoing communication signal based on a detected voltage on a voltage source. The voltage source is necessary to supply power for power ramp controlled communication buffer logic. The voltage on the voltage source may be detected using power ramp sensor logic. The outgoing communication signal is based on a core logic output signal if the detected voltage is greater than or equal to a predetermined voltage level. If, the detected voltage is less than the predetermined voltage level, the outgoing communication signal is predetermined to be one of: a tristate outgoing communication signal, a logic one outgoing communication signal and a logic zero outgoing communication signal. Power ramp controlled communication buffer logic may also generate a core logic input signal based on an incoming communication signal in response to the detected voltage.

Method and apparatus for controlling a communication signal by monitoring one or more voltage sources

Growing community of inventors

Toronto, Canada

Marcus Ng