Intel Corporation

Marcus Grindstaff

Aditya Sreenivas

Jeremy N Burr

Adam H Wilen

Rochelle J Whelan

An application processor coupled to a Static Random Access Memory (SRAM) interfaces with a graphics accelerator. A Dynamic Random Access Memory (DRAM) stores frame buffer data that may be transferred to a display through a switch located on the graphics accelerator in normal operation. In a power savings mode, the DRAM may be powered down and a copied frame buffer data stored in the SRAM may be transferred to the display through the switch.

Low power display refresh

Local memory associated with one or more companion devices within a system is mapped into a system memory for use by an application processor.

System with local unified memory architecture and method

A system correlates clock signal flight times between a device on a board and a device on a card that is coupled to the board. A board device first trace runs from a clock driver on the board to the card. A board device second trace runs back to the board device.

System for correlating clock flight times and method of using

The present invention is a method and apparatus to map first graphics pins into second graphics pins. A first plurality of data and command pins corresponding to data and command signals in a first graphics mode is mapped into a second plurality of data and command pins corresponding to data and command signals in a second graphics mode. The first and second graphics modes are supported by a first chipset. The second graphics mode is supported by a second chipset. A detector pin strappable to a logic level to indicate an external graphics card is used in the first graphics mode is mapped into a first pin corresponding to a first signal of the second graphics mode. The first signal is ignored by the second chipset during initialization.

Growing community of inventors

Folsom, CA, United States of America

Marcus Grindstaff