International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Marcus Alan Baker

William Edward Atherton

Eric Richard Kern

Jeffrey Buchanan Williams

Justin Potok Bandholz

Sheldon J Sigrist

Patrick M Bland

Alfredo Aldereguia

Andrew S Heinzmann

Karen April Taylor

Steven J Zaharias

Marlene J Gillingham

Sreekanth Konireddygari

Mark V Kapoor

Methods, apparatuses, and computer program products of extending cache in a multi-processor computer are provided. Embodiments include detecting, by a donor processor, nonuse of a donor processor's cache; broadcasting to one or more processors in the multi-processor computer, by the donor processor, a donor-ready message indicating the donor processor's cache is available for ownership transferment; receiving from a first requesting processor, by the donor processor, a first ownership-request message requesting ownership of the donor processor's cache by the first requesting processor; transmitting to the first requesting processor, by the donor processor, an ownership-grant message indicating an intention of the donor processor to transfer ownership of the donor processor's cache to the first requesting processor; and receiving from the first requesting processor, by the donor processor, an ownership-claim message indicating that the first requesting processor intends to claim ownership of the donor processor's cache.

Extending cache in a multi-processor computer

A computer program product and system for managing allocation of storage in a switch utilizing flow control are provided. The switch includes a plurality of ports and an internal storage divided into a plurality of storage units. The computer program product and system provide for monitoring an average number of storage units used by each of the plurality of ports over a predetermined time period, setting a threshold for the average number of storage units used by each of the plurality of ports, and allocating one or more available storage units assigned to a first port to a second port in response to storage allocation management being enabled for the second port and the average number of storage units used by the second port exceeding the threshold for the second port.

Storage allocation management in switches utilizing flow control

In some embodiments, a method for auto-configuring a network is disclosed. The method can include communicating with at least one node in a processing complex, receiving node connection data from the at least one node querying a node to verify at least a portion of the node connection data, and auto-configuring system partitioning in response to the node connection data. In some embodiments, the method can also include verifying the node connection data by transmitting a request for a universally unique identifier and a node identifier. The node identifier can be associated with the universally unique identifier. The node identifier can be utilized in data transmitted between nodes.

Arrangements for auto-merging processing components

A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for dynamically allocating lanes to a plurality of PCI Express connectors is disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors, creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors, and receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.

Structure for dynamically allocating lanes to a plurality of PCI express connectors

Method, apparatus, and computer program products for dynamically allocating lanes to a plurality of PCI Express connectors are disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.

Dynamically allocating lanes to a plurality of PCI express connectors

Methods and systems are disclosed for providing independent clock failover for scalable blade servers that include assigning a server blade to one of a plurality of clock failover groups, providing a plurality of independent clock signals to the clock generator of the server blade, wherein one of the plurality of independent clock signals is an active clock signal, detecting a failover condition for the clock failover group assigned to the server blade, and switching the active clock signal, in response to the detected failover condition, from one independent clock signal to another independent clock signal.

Providing independent clock failover for scalable blade servers

A receiving processor is configured with a normal (operational) path and a test path. The test path is configured in parallel with the normal path. The test path simulates and receives as input the same data as the normal path, but the test path has a separate voltage reference (V) which is applied to a test input buffer. The same data input to normal buffer is also input to the test buffer. The output of the test buffer is input to a test latch. A clocking signal supplied to the test latch is a variable clocking signal enabling the clock signal to be skewed selectively. The output of the test latch is compared with the output of the normal latch, and differences between the two output signals defines an error for a particular voltage/clock-skew combination.

Dynamic determination of signal quality in a digital system

A method for dynamically allocating lanes to a plurality of PCI Express connectors is disclosed that may comprise identifying whether a PCI Express device is installed into each PCI Express connector, identifying historic data traffic for each PCI device installed into the plurality of PCI Express connectors, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. The method may also comprise identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors. Moreover, the method may comprise creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors. Furthermore, the method may comprise receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.

Method for dynamically allocating lanes to a plurality of PCI Express connectors

Method and system for saving the state of integrated circuit chips upon failure. In one aspect of the invention, a system for saving the state of an integrated circuit includes a non-volatile memory and a state-saving controller coupled to the non-volatile memory and coupled to the integrated circuit, where the state-saving controller saves the state of the integrated circuit to the non-volatile memory when a failure occurs in the integrated circuit.

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Apex, NC, United States of America

Marcus Alan Baker