Signetics

A-Sat Corporation

Advanced Semiconductor Assembly Technology

Hewlett-Packard Company

Signetics Kp Co., Ltd.

Marcos Karnezos

Farid Matta

Edward G Combs

Lawrence R Hanlon

Ravindhar K Kaw

Ju Yung Sohn

Seung Ryul Ryu

John R Fahey

S C Chang

A tape ball grid array (TBGA) semiconductor package having a one metal layer interconnect substrate is provided. Further provided is a method for making the TBGA package having electrical connection through the one metal layer interconnect substrate down to a ground plane. The method includes: (a) defining at least one via hole through the one metal layer interconnect substrate; (b) filling the at least one via hole of the one metal layer interconnect substrate with a first solder ball; (c) reflowing the first solder ball; (d) placing a second solder ball over the reflowed first solder ball; and (e) reflowing the second solder ball to attach the second solder ball to the reflowed first solder ball. The reflowed first solder ball and the reflowed second solder ball form a ground via connection to the ground plane of the TBGA.

Methods for forming ground vias in semiconductor packages

Disclosed is a semiconductor package arrangement. The package arrangement includes a heat spreader for dissipating heat generated within the semiconductor package arrangement. The package further includes a ground plane having a first side that is attached to the heat spreader with an electrically insulating adhesive. The ground plane has a first aperture defining a path to a surface of the heat spreader that is configured to receive a semiconductor die. An interconnect substrate is adhesively attached to the ground plane, and the interconnect substrate has a complementary second aperture over the first aperture of the ground plane. Preferably, the interconnect substrate has a plurality of metal patterns for electrically interconnecting the semiconductor die to electrical connections that are external to the semiconductor package arrangement. The package arrangement further includes at least one conductively filled via that is defined through the interconnect substrate and is in electrical contact with the ground plane to establish a direct ground connection from selected ones of the plurality of metal patterns of the interconnect substrate. Preferably, a second side of the ground plane includes patterned wetable platting pads over selected regions that are in electrical contact with the at least one conductively filled via that is defined through the interconnect substrate.

TBGA semiconductor package

A molded plastic package for semiconductor devices incorporating a heat sink, controlled impedance leads and separate power and ground rings is described. The lead frame of the package, separated by a dielectric layer, is attached to a metal heat sink. It has more than one ring for power and ground connections. The die itself is attached directly onto the heat sink through a window on the dielectric and provides high power dissipation. The package is molded using conventional materials and equipment.

Molded plastic package with heat sink and enhanced electrical performance

Methods for manufacturing ball grid array assembly semiconductor packages

Disclosed is a semiconductor package arrangement. The package arrangement includes a heat spreader for dissipating heat generated within the semiconductor package arrangement. The package further includes a ground plane having a first side that is attached to the heat spreader with an electrically insulating adhesive. The ground plane has a first aperture defining a path to a surface of the heat spreader that is configured to receive a semiconductor die. An interconnect substrate is adhesively attached to the ground plane, and the interconnect substrate has a complementary second aperture over the first aperture of the ground plane. Preferably, the interconnect substrate has a plurality of metal patterns for electrically interconnecting the semiconductor die to electrical connections that are external to the semiconductor package arrangement. The package arrangement further includes at least one conductively filled via that is defined through the interconnect substrate and is in electrical contact with the ground plane to establish a direct ground connection from selected ones of the plurality of metal patterns of the interconnect substrate. Preferably, a second side of the ground plane includes patterned wettable platting pads over selected regions that are in electrical contact with the at least one conductively filled via that is defined through the interconnect substrate.

Ball grid array semiconductor package

A TAB Grid Array (TGA) package allows automated assembly using established manufacturing equipment similar to those used in the production of plastic ball grid Array (PBGA) package assembly. The TGA package are formed, using as starting material, a metal strip having the same critical dimensions and tooling holes as those used for a PBGA package. In this invention, the stiffener is designed to serve as a carrier throughout the assembly of the TGA package. The wire bonded TGA cavity package, including the solder balls, is first fully assembled prior to the attachment of the semiconductor die. Subsequently, the semiconductor die is attached to the stiffener, wires are bonded between the semiconductor die and the tape frame, and the entire assembly is encapsulated. The process of the present invention provides a high device assembly yield usually not achievable by the PBGA packages. The choice of high temperature tape and epoxy allows the use of high temperature solder balls which provide for higher package-to-motherboard assembly reliability. Further, the high electrical performance of the TGA package is achieved by using a two-metal layer tape. In one embodiment, the first layer is used for signal connections, the second layer is used for routing the power signal and the stiffener is used for routing the ground signal.

Structure and method for automated assembly of a tab grid array package

A TAB Grid Array (TGA) package is a package for an integrated circuit. A TGA package provides an efficient structure and method to connect a semiconductor die encapsulated in the TGA package to an external printed circuit board (PCB). The TGA package uses a tape automated bonding (TAB) technique to provide a generally flexible dielectric film bearing a pattern of conductive traces radially emanating from a die aperture to connect to an area array of pads arranged on the tape perimeter. The pads of area array of pads are connected to the TAB traces using conventional TAB inner lead bonding techniques, or alternatively, wire bonding methods, with both the semiconductor die and the TAB traces facing down towards the PCB. In one embodiment, the back of a semiconductor die and the TAB tape are attached to a stiffener via suitable bonding agents. The stiffener provides the mechanical rigidity to the package and efficiently removes the dissipated power. By using an encapsulation material, both the semiconductor die and the bonds between the semiconductor die and the TAB tape are protected from the environment. Solder balls are attached on the area array of pads of the TGA package facing down. These same solder balls in turn are used to electrically and mechanically connect the package to the external PCB.

Process for assembling a TAB grid array package for an integrated circuit

A TAB Grid Array (TGA) pack package for an integrated circuit. A TGA package provides an efficient structure and method to connect a semiconductor die encapsulated in the TGA package to an external printed circuit board (PCB). The TGA package uses a tape automated bonding (TAB) technique to provide a generally flexible dielectric film bearing a pattern of conductive traces radially emanating from a die aperture to connect to an area array of pads arranged on the tape perimeter. The pads of area array of pads are connected to the TAB traces using conventional TAB inner lead bonding techniques, or alternatively, wire bonding methods, with both the semiconductor die and the TAB traces facing down towards the PCB. In one embodiment, the back of a semiconductor die and the TAB tape are attached to a stiffener via suitable bonding agents. The stiffener provides the mechanical rigidity to the package and efficiently removes the dissipated power. By using an encapsulation material, both the semiconductor die and the bonds between the semiconductor die and the TAB tape are protected from the environment. Solder balls are attached on the area array of pads of the TGA package facing down. These same solder balls in turn are used to electrically and mechanically connect the package to the external PCB.

Tab grid array

An electronic packaging module in which the inactive sides of integrated circuit chips are held in compression against a heat spreader by an elastomer pressed thereagainst by a multilayer flexible printed circuit board. A TAB frame, which may be demountable, interconnects integrated circuit chips to a multilayer flexible printed circuit board. A backing plate is fastened to a heat spreader so that it presses against the multilayer flexible printed circuit board. Contacts are compressed against the motherboard to interconnect the multilayer flexible printed circuit board thereto. Coaxial power connectors provide power and ground connections between non-peripheral portions of the multilayer flexible printed circuit board and the motherboard.

Growing community of inventors

Menlo Park, CA, United States of America

Marcos Karnezos