Stmicroelectronics S.r.l.

Stmicroelectronics Gmbh

Sgs-thomson Microelectronics S.r.l.

Upek, Inc.

Marco Sabatini

Giovanni Gozzini

Alan H Kramer

Roberto Antonio Canegallo

Pier Luigi Rolandi

Mauro Chinosi

Alexander Kalnitsky

Bhusan Gupta

Vito Fabbrizio

Frederic Raynal

Philip Leong

Frank R Bryant

Marco Onorato

James Chester Meador

Bhusian Guptz

A fingerprint sensor includes an array comprising a plurality of capacitive pixel cells. Each of the capacitive pixel cells includes a pair of metal plates and a reset transistor. The reset transistor includes a gate, a source connected to one of the metal plates and a drain connected to the other of the metal plates. A reset buffer generates a reset signal. A regenerator is associated with each reset transistor of each capacitive pixel cell. The regenerator regenerates the reset signal received from the reset buffer to eliminate injection gradient over the array.

Method of and system for compensating for injection gradient in a capacitive sensing circuit array

Current drawn by the fingerprint sensor subject to electrostatic discharge events not fully dissipated by a pad ring is monitored. Upon detection of an overcurrent (e.g., an increase in the current drawn by approximately an order of magnitude) indicating that a latchup condition has occurred, power is removed from the sensor, together with all inputs to the sensor, until the latchup condition is cleared. If a processor or controller is employed by the sensor, the processor or controller is concurrently reset since a firmware crash may be induced by the latchup condition. If a parallel port or other communications connection is employed by the sensor, the overcurrent signal is employed to directly disconnect power and input signals to the sensor.

Automatic latchup recovery circuit for fingerprint sensor

A narrow array optical fingerprint detector that substantially eliminates over-sampling of the array measures the speed of a finger moving over the array and scans the array at a rate determined by the speed of movement of the finger. The fingerprint detector measures the speed of finger movement with a transparent cylinder rotatably mounted adjacent the array. The transparent cylinder is mounted to engage the finger and rotate as the finger is swept past the array. A light chopper is mounted for rotation with the cylinder. A photo-sensor is mounted adjacent the light chopper. The photo-sensor produces a signal in response to light being chopped by the light chopper. The photo-sensor is operably connected to scanning circuitry. Each time the scanning circuitry receives a signal from the photo-sensor, the scanning circuitry scans the array.

Scanning optical semiconductor fingerprint detector

A power management unit monitors current drawn by a fingerprint sensor circuit and generates a &ldquo;heartbeat&rdquo; signal during normal operation. If a latchup event occurs, with attendant increase in current drawn by the fingerprint sensor circuitry, the heartbeat signal terminates and an interrupt is subsequently triggered to start a latchup recovery routine. Power to the fingerprint sensor circuitry is switched off and the interrupt is then cleared by writing appropriate values to control bits within the power management register.

Fingerprint sensor power management detection of overcurrent

The charge injection circuit of this invention comprises at least one pair of floating gate MOS transistors having source and drain terminals which are coupled together and to an injection node, and at least one corresponding pair of generators of substantially step-like voltage signals having an initial value and a final value, and having outputs respectively coupled to the control terminals of said transistors. The signal generators are such that the initial value of a first of the signals is substantially the equal of the final value of a second of the signals, and that the final value of the first signal is substantially the equal of the initial value of the second signal.

Floating gate MOS transistor charge injection circuit and computation devices incorporating it

Disclosed is a CMOS image sensor that includes pixels employing a radiation-sensitive resistive element in which the resistance of the element changes in response to the quantity of radiation striking it. The resistive elements are made from an appropriately doped polycrystalline semiconductor material such as polysilicon. The pixels are provided on a semiconductor device in which the photosensitive resistive elements are provided on a first layer and the pixel associated transistors are provided on a second layer. The fill factor may be approach 100 percent for such pixels.

Solid state optical imaging pixel with resistive load

A parallel pipelined analog-to-digital converter for use with chips containing large arrays of detectors is described. In these A/D converters, the degree of parallelism decreases between earlier and later pipeline stages. That is, there are fewer instances of at least one of the later stages than there are instances of at least one of the earlier stages. Thus, the instances of the earlier stages are responsible for processing a fewer number of pixels than are instances of the later stages. Viewed another way, the parallel pipelined analog-to-digital converter architecture of this invention assumes a tree or branched arrangement in which the earlier stages correspond to leaves and the later stage condense to branches. In an extreme example, the later stages coalesce to a single route.

Analog-to-digital converter for processing analog signals from a large

A variable capacitor in a semiconductor device is described in which the capacitance is varied by the movement of a dielectric material in the space between the plates of the capacitor in response to an external stimulus. A method of making such a variable capacitor is also described in which the capacitor is built in a layered structure with the top layer including a portion of dielectric material extending into the space between the capacitor plates. After formation of the top layer, an intermediate layer is etched away to render the top layer flexible to facilitate movement of the dielectric material in the space between the capacitor plates.

Method of making a semiconductor variable capacitor

This invention relates to a voltage comparator with an input for an analog signal and an output for a digital signal, comprising an inverter which has an input coupled to the comparator input and an output coupled to the comparator output, and comprising at least two MOS transistors coupled to each other, at least one of the two MOS transistors being of the floating gate type.

Voltage comparator with floating gate MOS transistor

The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals and an output for an analog signal. It comprises a current amplification circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs and having their source terminals coupled together and to a first reference of potential. The converter has drain terminals coupled together and to the input of the amplification circuit, and has control terminals coupleable, under control from the inputs of the plurality, to different references of potential having selected fixed values.

Digital-to-analog current converter employing floating gate MOS

A photodiode structure augmented with active area photosensitive regions is used for detecting impinging radiation. The photodiode includes a semiconductor base layer doped with impurities of a first carrier type, a field oxide layer disposed upon the base layer with an opening formed therethrough, a plurality of auxiliary oxide layers wherein each is separately disposed upon the base layer, and a semiconductor diffusion layer doped with impurities of a second carrier type arranged upon the base layer and in contact with the oxide layers. When the photodiode is electrically energized, a plurality of integral photosensitive regions is created within the depletion region to facilitate the detection of impinging radiation at an increased quantum efficiency.

Photodiode structure augmented with active area photosensitive regions

Semiconductor variable capacitor

An input structure for associative memories, including an array of elementary cells, a number of input lines, a number of output lines, a number of address lines, and a number of enable lines. Each elementary cell is formed by a D flip-flop having a data input coupled to one of the address lines and an enable input coupled to one of the enable lines, and by a switch coupled between an input line and an output line, and having a control input coupled to the output of a respective latch to selectively couple the respective input line and output line according to the data stored in the latch.

Input structure for analog or digital associative memories

The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals, and an output for an analog signal. It also contains a charge integration circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs, the MOS transistors all having their source and drain terminals coupled together and to the input of the integration circuit, and having control terminals coupleable, under control from the plurality of inputs of digital signals, to different reference voltages having selected fixed values.

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Kensington, CA, United States of America

Marco Sabatini