Infineon Technologies Ag

Infineon Technologies Austria Ag

Marco Flaibani

Cristian Garbossa

Emanuele Bodano

Enrico Orietti

Marco Piselli

Andrea Vecchiato

Giuseppe Loccia

Stefano Orlandi

Winand Van Sloten

Davide Dal Bianco

Stefano Zampieri

Tommaso Pieretti

Giovanni Bisson

Glovanni Bisson

Christian Garbossa

A circuit includes a switching signal generator and synchronization circuitry configured to determine a first time of a switching period based on a switching signal. The circuit further includes a comparison signal generator configured to generate a comparison signal with a first constant rate of change after the first time. The synchronization circuitry is further configured to determine a second time of the switching period based on when current at the inductive element changes from a positive current to a negative current. The comparison signal generator is further configured to generate the comparison signal with a second constant rate of change after the second time. The circuit further includes a threshold detector configured to compare a value of the comparison signal at the end of a target switching period with a threshold value.

Comparison signal generator for power converter

In some examples, a device for controlling a transistor in a power converter system includes a first circuit configured to generate an error current based on a difference between a reference signal and a feedback signal, where the feedback signal depends on an output voltage of the power converter system. The device also includes a frequency generator configured to generate an activation signal based on the difference between the reference signal and the feedback signal. The device further includes a pedestal circuit configured to define a peak current threshold for the transistor based on an offset value. The device also includes a logic circuit configured to activate the transistor based on the activation signal and deactivate the transistor when a current sense signal reaches the defined peak current threshold, where the current sense signal is representative of a power current conducted by the transistor.

Peak detection for current mode control in a power converter system

The disclosure describes techniques for measuring the average output current of a power converter circuit by determining peaks valleys in the output current. A current monitoring circuit may include an averaging unit, which may sample the output current during a current peak as well as during a current valley. During a hold phase the averaging unit may output a signal proportional to the average output current based on the sampled peak current and sampled valley current. In some examples, the averaging unit may include three functional units. A first unit may be configured to determine the output current, a second block may be configured to hold the previously determined peak current and a third block may be configured to hold the previously determined valley current. In this manner the averaging unit may continuously output a signal proportional to the average output current of the power converter.

Current sensing for monitoring load current in a buck power converter

In accordance with an embodiment, a circuit includes a power conversion circuit including an inductor and configured to convert an input voltage to an output voltage in accordance with at least one switching signal. The circuit further includes a first current sense circuit configured to generate a current sense signal that represents an inductor current, a voltage sense circuit configured to generate a voltage sense signal that represents the output voltage, and a switching controller including an error amplifier configured to generate an error signal representing the difference between a reference voltage and the voltage sense signal. The switching controller further includes an oscillator circuit configured to generate, for pulse frequency modulation (PFM) operation of the power conversion circuit, the switching signal as a sequence of pulses with a pulse repetition frequency that depends on the error signal and the current sense signal.

Switching converter using pulse-frequency modulation and current-mode control

A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Low-dropout voltage regulator

In an embodiment, a method of operating a switched-mode power supply includes producing an error signal based on a difference between a power supply output voltage and a reference voltage. A clock frequency is produced that is proportional to the error signal up to maximum frequency, and a sensed current signal is produced that is proportional to a current in switched-mode power supply. The error signal is summed with the sensed current signal to produce a first signal, and the first signal is compared to a first threshold. The method also includes producing a first edge of a drive signal at a first edge of the clock signal, and producing a second edge of the drive signal when the first signal crosses the first threshold in a first direction based on the comparing, where the second edge opposite the first edge.

System and method for controlling a switched-mode power supply

In an embodiment, a method of driving a switch transistor includes activating the switch transistor by charging a control node of the switch transistor at a first charging rate for a first time duration. After charging the control node of the switch transistor at the first charging rate, the control node of the switch transistor is further charged at a second charging rate until the control node of the switch transistor reaches a target signal level, where the second charging rate is less than the first charging rate.

System and method for driving a switch transistor

The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.

High speed level shifter

A circuit arrangement comprising a high-side semiconductor switch with a first load terminal connected to a first supply terminal receiving an input voltage, a second load terminal connected to an output terminal providing an output signal, and a control terminal, a floating driver circuit connected to the control terminal for driving the semiconductor switch, a level shifter receiving an input signal and providing a floating input signal dependent on the input signal, a floating control logic receiving the output signal and the floating input signal and providing at least one control signal to the floating driver circuit, wherein the floating control logic comprises means for detecting an edge in the output signal and means for generating the control signal dependent on the result of the edge detection.

High-side switch with a zero-crossing detector

An integrated circuit having a bootstrap charger for using in a switching mode power supply is disclosed. In one embodiment, a capacitor is connected between a floating terminal and a bootstrap supply terminal with a voltage drop over the capacitor, a comparing device with a first input terminal receiving a fraction of the voltage drop, a second input terminal receiving a reference, and an output terminal providing a control signal, and a charge circuit configured to charge the capacitor dependent on the control signal.

Growing community of inventors

Padua, Italy

Marco Flaibani