Infineon Technologies Ag

Infineon Technologies Austria Ag

Marco Bachhuber

Michael Krug

Marcus Nuebling

Tommaso Bacigalupo

Tomas Manuel Reiter

Laurent Beaurenaut

Matthias Weinmann

Jens Barrenscheen

Ralf-Rainer Schledz

Markus Winkler

Georgi Nikolov Panov

Benedikt Hanelt

Marcus Nübling

In some examples, a method comprises communicating first data between a first circuit and a second circuit via a differential communication channel across a galvanic isolation barrier within a circuit package, wherein the first data is coded via a first coding technique that comprises ON-OFF shift Keying (OOK) with a differential carrier signal. The method also includes communicating second data between the first circuit and the second circuit via the differential communication channel across the galvanic isolation barrier within the circuit package, wherein the second data is coded via a second coding technique comprises differential pulse coding.

Differential data transmission between galvanically isolated circuits within a circuit package

A gate driver circuit includes one or more datastores configured to store one or more result registers, timer circuitry configured to generate a timing signal, and logic circuitry. The logic circuitry is configured to drive switching circuitry using a switching signal and determine a triggering point of a first cycle of the switching signal. In response to the determination of the triggering point, the logic circuitry is configured to control, using the switching signal, one or more analog-to-digital converters (ADCs) to store a first data sample at the one or more result registers. In response to a determination that the switching signal does not include a triggering point, the logic circuitry is configured to control, using the timing signal, the one or more ADCs to store a second data sample at the one or more result registers.

Gate driver circuit for sampling without a triggering point

A circuit includes one or more datastores configured to store a result register and a readout counter value and logic circuitry coupled to the one or more datastores. The logic circuitry is configured to cause, for a cycle of a plurality of cycles of a periodic signal, one or more analog-to-digital converters (ADCs) to store data to the result register and modify the readout counter value in response to the one or more ADCs storing the data to the result register for the cycle. In response to a read request for the data at the result register for the cycle, the logic circuitry is configured to output the data stored by the result register, output the readout counter value for the cycle, and, after the output of the readout counter value, set the readout counter value to a predetermined value.

Result register with readout counter value

Overload detection and protection for power switch circuits. For circuits with faster switching speed, fast fault detection and response to a detected overload condition may be desirable. Detection circuitry may monitor a voltage on the control terminal of one or more power switches. Based on empirical measurements, in an overload condition of a power switch circuit, e.g., a half-bridge circuit, the voltage at the control terminal may increase, and in some examples, increase to a magnitude that is greater than a supply voltage. A comparator may detect a voltage increase that exceeds a voltage magnitude threshold, output an indication to control circuitry for the power switch circuit, and the control circuitry may take action to protect the rest of the circuitry, such as reduce voltage or shut off the power switch circuit.

Diagnosis of gate voltage to detect high current

This disclosure describes circuits and techniques for identifying potential problems with control signals for power switches. More specifically, this disclosure describes the use of registers, e.g., volatile or non-volatile storage elements, configured to count the rising and/or falling edges of pulse modulation (PM) signals within driver circuits or other control circuits. By counting the edges of PM signals within driver circuits, signaling problems can be identified based on mismatch between different counters. The techniques may be used by a driver circuit to detect circuit problems, or readout of the registers can be done after device failure, in order to help identify whether signaling problems may have caused the device failure.

Pulse counting registers for monitoring control signals of power switches

An example a circuit for controlling a power converter comprises a first power domain circuit including a first control circuit and a first driver circuit, wherein the first control circuit controls the first driver circuit to drive a first semiconductor device, wherein a second power domain circuit includes a second control circuit and a second driver circuit. The first control circuit is configured to receive a control signal for controlling the second driver circuit to drive a second semiconductor device; and identify, based on the control signal, a future electrical characteristic of a second power domain output of the power converter. Additionally, the first control circuit is configured to determine, based on the future electrical characteristic of the second power domain output of the power converter, whether to adjust one or more control parameters for controlling the first driver circuit to drive the first semiconductor device.

Analyzing a control signal in order to control a power converter to deliver energy to a load

A driver circuit is configured to deliver drive signals from an output pin to a power switch to control ON/OFF switching of the power switch. A first detection pin of the driver circuit is configured to receive a first signal associated with the power switch, wherein the first signal indicates a voltage drop over the power switch and a voltage drop over one or more other circuit elements. A second detection pin is configured to receive a second signal, wherein the second signal indicates a voltage drop over one or more matched circuit elements, wherein the one or more matched circuit elements associated with the second signal are substantially identical to the one or more other circuit elements associated with the first signal. The driver circuit is configured to determine the voltage drop over the power switch based on a difference between the first signal and the second signal.

Differential techniques for measuring voltage over a power switch

This disclosure is directed to circuits and techniques for protecting a body diode of a power switch from an inductive load when the power switch is turned OFF. A driver circuit may detect whether the power switch is in a desaturation mode when the power switch is turned ON and disable the power switch in response to detecting that the power switch is in the desaturation mode. In addition, the driver circuit may detect whether the body diode of the power switch needs protection when the power switch is turned OFF, and in response to detecting that the body diode needs protection, control the power switch according to a body diode protection scheme.

Protecting a body diode of a power switch

A method of operating a power switch driver circuit coupled to a power switch includes producing, by a controller of the power switch driver circuit, a first driving signal to a control terminal of the power switch to turn on the power switch; comparing, by a first comparator of the power switch driver circuit, a first voltage at the control terminal of the power switch with a first pre-determined threshold; and starting monitoring a desaturation condition of the power switch a pre-determined period of time after detecting that the first voltage is above the first pre-determined threshold, wherein monitoring the desaturation condition comprises monitoring a second voltage at a load path terminal of the power switch.

Gate level triggered desaturation blanking

A gate driver is described that includes a gate signal module configured to output a gate signal of the gate driver for driving a gate terminal of a semiconductor device. The gate driver further includes a test module configured to generate a simulated failure condition at a semiconductor device during a test of a monitoring and protection feature of the gate driver. The gate drier further includes a monitor module configured to output an indication of the simulated failure condition in response to detecting the simulated failure condition at the semiconductor device.

Verification of gate driver protection logic

In accordance with an embodiment, a method of operating a gate driving circuit includes receiving a reference timing pulse, measuring the received timing pulse according to a local clock generator of the gate driving circuit, and generating a switching control signal based on the measured received timing pulse.

System and method for a driver circuit with a referenced control signal

Digital-to-analogue converter for converting a digital input signal into an analogue output signal includes a resistor string with switchable taps, a decoder circuit for connecting or disconnecting the taps in a manner dependent on the digital input signal, and a voltage divider. The voltage divider is operable to generate a divider voltage that divides a voltage difference that occurs between two connectable taps. The analogue output voltage is dependent on the divider voltage generated by the voltage divider.

High-resolution digital-to-analogue converter with a small area requirement

An apparatus converts a digital value including &ldquo;a&rdquo; bits into an analog signal and has 2 D/A converters. Here, b is an integer number that is greater than 0. Each of the D/A converters is designed to convert a digital value having &ldquo;a&minus;b&rdquo; bits. The digital value that is supplied (for i&equals;1 . . . 2 ) to the ith D/A converter for the purpose of D/A conversion corresponds to the &ldquo;a&minus;b&rdquo; most significant bits in the sum of the digital value that will be converted by the apparatus and to i&minus;1. The output signal for the apparatus is the mean value for the output signals from the D/A converters. Such an apparatus can be produced such that it can be accommodated easily and efficiently on a semiconductor chip and, irrespective of the details of protocol implementation, permits a completely linear conversion of the digital value being converted into an analog signal.

Growing community of inventors

Neuried, Germany

Marco Bachhuber