Stmicroelectronics S.a.

Stmicroelectronics (grenoble 2) Sas

Stmicroelectronics (alps) Sas

Marc Sabut

Hugo Gicquel

François Van Zanten

Jean-Luc Moro

Fabien Reaute

Michel Mouret

Raymond Ribas

François Jacquet

Severin Trochut

Thierry Masson

Sébastien Barasinski

Fabrice Blisson

Danika Perrin

Fran&ccedil;ois Van Zanten

Paolo Gatti

Sophie Minot

Emmanuel Allier

Christophe Curis

Valerie Carrat

Matthieu Desvergne

In an embodiment a switch includes a first MOS transistor having its source connected to its channel-forming region and coupled with a first terminal of the switch, its drain coupled with a second terminal of the switch, and its gate connected to a first node of the switch, a diode coupling the first terminal with the first node, a capacitive element coupling a third terminal of the switch with the first node, the third terminal being configured to receive a control signal for the switch and a discharge circuit coupling the first node with the first terminal, the discharge circuit configured to conduct only when a voltage between the first node and the first terminal is greater than or equal to a threshold.

Switch and sampling circuit

In an embodiment, a method for soft-starting an SMPS includes: asserting an enable signal; disabling an output stage of the SMPS; after asserting the enable signal, measuring a feedback voltage of the SMPS; receiving a first reference voltage at an input reference node; comparing the measured feedback voltage with the first reference voltage; and, when the measured feedback voltage is lower than the first reference voltage, storing the feedback voltage in a soft-start capacitor, connecting an output reference node to the soft-start capacitor, enabling the output stage of the SMPS, and switching a transistor of the output stage to regulate the output voltage based on the feedback voltage and a second reference voltage at the output reference node, and injecting a current into the soft-start capacitor.

SMPS power-on with energy saver

A pulse width modulation device includes a switching transistor for defining modulation phases, a capacitor, and switches arranged to: a) in a first phase, charge the capacitor to a voltage corresponding to the on/off threshold of the switching transistor, and b) in a second phase, connect the capacitor between a terminal for applying a setpoint voltage and the gate of the switching transistor. A constant current source is connected to apply a current in the capacitor tending to bring the gate of the switching transistor toward the on/off threshold.

Comparator-less pulse-width modulation

A switched capacitor amplifier having an amplification unit adapted to amplify a differential signal; a first switched capacitor block including a first plurality of capacitors operable to sample a first differential input signal during a first sampling phase and to drive the amplification unit during a first drive phase; and a second switched capacitor block including a second plurality of capacitors operable to sample a second differential input signal during a second sampling phase and to drive the amplification unit during a second drive phase.

Switched capacitor amplifier

A device may include a programmable gain amplifier and an analog-digital converter with pipeline architecture having several stages. The first stage of the analog-digital converter may incorporate the programmable gain amplifier and an analog-digital conversion circuit with a programmable threshold.

Analog-digital converter with pipeline architecture associated with a programmable gain amplifier

The common-mode voltage of a switched-capacitor system is controlled by determining a current common-mode voltage of the switched-capacitor system, converting (in a flow-through conduction cell) the difference between the current common-mode voltage and a desired common-mode voltage into a resultant current, and reinjecting this resultant current into the switched-capacitor system via a resistive path.

Method and device for controlling a common-mode voltage of a switched-capacitor system, in particular an analog-to-digital converter

A voltage regulator includes an amplifier and a regulation loop. The regulator includes a first PMOS transistor connected to a terminal supplying an input voltage, a second PMOS transistor connected in series with the first PMOS transistor. A node between those two transistors defines an output terminal. A first source of a first polarization current of fixed value is connected to the gate of the first transistor, and a second source of a second polarization current of fixed value connects the second transistor to ground. A third NMOS transistor is connected between the two current sources. A circuit is provided to modify automatically at least one of the polarization currents in relation to the load current.

Voltage regulator with self-adaptive loop

A memory device of SRAM type has a memory plan constituted by base memory cells organized in lines and in columns. Each cell of a column is connected between two bit lines which are precharged during a reading operation. Circuitry is provided for generating a precharge voltage of the bit lines which is less than a nominal supply voltage of the device.

Memory device of SRAM type

A circuit of generation of a reference voltage by a first MOS transistor connected to a first terminal of application of a supply voltage, the first transistor being in series with a second MOS transistor controlled by an input stage of a transconductance amplifier and their junction point defining an output terminal providing the reference voltage, a first current source connecting the first supply terminal to a gate of the first transistor, a second current source connecting the second transistor to a second terminal of application of the supply voltage, at least one third MOS transistor connecting the two current sources, and a capacitive element directly connecting the output terminal to a conduction terminal of the third transistor to vary the conduction of this third transistor in case of a variation in output voltage.

Circuits for generating a reference voltage

A differential amplifier having a first and second output terminals and receiving an input signal at an input terminal. The amplifier comprises a first amplifier having a first input connected to the input terminal, a second input and a first output connected together to the first output terminal, and a second output connected to the second output terminal, the first amplifier reproducing the input signal on the first output. The amplifier comprises a second amplifier having a first input receiving a reference signal and a second input connected to the output terminals by resistive elements and controlling the provision by the first amplifier on the second output of a signal such that the signals received at the first and second inputs of the second amplifier are equal.

Differential amplifier with two outputs and a single input of improved linearity

An input stage for a video receiver includes a variable gain amplifier, an analog-to-digital converter for sampling a video signal and a digital processing unit for processing digital samples of the video signal. An analog regulating circuit sets an input potential at an input of the variable gain amplifier. A differential architecture is used for the variable gain amplifier and the digital analog converter. A conversion circuit between an input coupling capacitor and the variable gain amplifier allows generating the video signal on two channels in antiphase, which are centered on the common mode voltage. Such differential architecture allows reducing the amplitude of analog signals, which is particularly advantageous in the case of a low voltage supply delivering a few volts. In addition, linearity of the video signal processing is enhanced.

Calibration device for a video input stage

A variable-gain amplifier with a differential input and differential output, including an attenuator block, receiving an input voltage and providing, on several outputs, voltages, each of which is equal to the attenuated input voltage; differential transconductor elements, each having a first input connected to a respective output of the attenuator block, and generating first and second positive currents and first and second negative currents; a current source assembly adapted to controlling the transconductance of each differential transconductor element according to an analog control signal; and an output block converting first and second input currents into a differential output voltage and providing a second input of each differential transconductor element with a feedback voltage depending on the output voltage.

Variable-gain differential input and output amplifier

A controllable assembly of current sources includes several first output terminals, with a first transistor associated with each first output terminal, the current on each first output terminal depending on the current flowing through the first transistor, and a circuit configured, in response to a predetermined variation of a control voltage, to successively progressively turn on, then progressively turn off, each first transistor. The first transistors are MOS transistors, and each first output terminal is associated with a current mirror formed of MOS transistors, the current mirror providing to the first output terminal a current depending on the current flowing through the first transistor.

Current source assembly controllable in response to a control voltage

A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

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Eybens, France

Marc Sabut