Ami Semiconductor, Inc.

On Semiconductor Trading, Ltd.

Emma Mixed Signal C.v.

Semiconductor Components Industries, LLC

Marc Matthey

Todd Schneider

Jakob Nielsen

Andreas Drollinger

In a listening device such as for example a hearing aid () where an input signal () is received by a microphone (), converted from analog to digital (), digitally processed () including a conversion from a time domain into a frequency domain, converted from digital to analog () and transmitted to a user by means of a loudspeaker (), the internal digital processing () generates an unwanted noise signal, the so called undesired periodic noise (), at specific frequencies. The undesired periodic noise is coupled via ground and the battery () into the signal processing path. According to the invention, the undesired periodic noise is filtered out of the input signal () during the digital signal processing (), after the conversion of the digital signal into the frequency domain.

Listening device

A method and system for reducing audible side effects of dynamic current consumption is provided. The system includes an audio subsystem, and a plurality of digital subsystems. The audio subsystem and the digital subsystem are powered by a common power supply. T he digital subsystem processes data packets including audio data packets. The processing events implemented in one or more than one digital subsystem are reorganized to change the profile for executing the events inside the subsystem(s). The dynamic current spectral properties in one or more digital subsystems are changed.

Method and system for reducing audible side effects of dynamic current consumption

A modulo arithmetic () for generating the addresses for accessing the memory cells of a memory in a DSP (digital signal processor) includes three inputs: an input address (), an increment () and a modulo value (). The next address () is generated based on these inputs as follows. An adder () generates a first address () by adding the input address () and the increment () and a second address () is generated by subtracting the modulo () from the first address () by means of the subtractor (). The comparator () checks whether the second address is lower than or equal to zero and if so, the multiplexer () outputs the first address at its output (). If the second address is higher than zero, the multiplexer () is controlled such that it outputs the second address (). A further comparator () compares the input address () and the modulo (). If the input address () is different from the modulo (), the multiplexer () generates the next output address () by selecting the output () of the multiplexer () and if the input address () is equal to the modulo () the multiplexer () generates the next output address () by selecting the constant value '0' () inputted at a second input of the multiplexer (). This modulo arithmetic allows to directly and repeatedly access the elements of a matrix stored in a digital memory row by row in a direction of its columns.

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Neuchâtel, Switzerland

Marc Matthey