International Business Machines Corporation

Marc H Brodsky

Frank F Fang

Bernard S Meyerson

Bruce A Scott

Zeev A Weinberg

A homojunction bipolar transistor having a superlattice base region comprising alternate layers of extrinsic and intrinsic layers, with extrinsic layers being of the opposite conductivity of the emitter and collector layers of the transistor. The alternate extrinsic and intrinsic layers have substantially different doping levels providing abrupt transitions in the valence and conduction bands between layers. The abrupt transitions result in the energy band gap in the base region being effectively reduced with respect to the band gap in the emitter region. In one embodiment, the effective narrow band gap base transistor is implemented by converting a portion of the upper layers of the superlattice to a homogeneous region by heavily doping the portion to form the emitter of the transistor.

Effective narrow band gap base transistor

A thin film transistor technology where a gate member on a substrate surface is in electric field influenceable proximity to active semiconductor devices in the direction normal to the substrate surface and the ohmic electrodes of the active device are parallel with the substrate surface. The gate is formed on the substrate and conformal coatings of insulator and semiconductor are provided over it. A metal is deposited from the direction normal to the surface that is thicker in the horizontal dimension than the vertical so as to be susceptible to an erosion operation such as a dip etch which separates the metal into self-aligned contact areas on each side of a semiconductor device channel without additional masking. Self-alignment of the source, drain and gate can be achieved by insulator additions above and under the gate fabricated without additional masking.

Amorphous thin film transistor device

Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including decreased water content and reduced trapping of electrons, by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing inert gas, to heating radiation from a halogen lamp for a duration on the order of ten seconds to achieve annealing temperature in the range 600C.-800C.

Rapid thermal annealing of silicon dioxide for reduced electron trapping

Disilane (Si.sub.2 H.sub.6), trisilane (Si.sub.3 H.sub.8) or a higher order silane is applied in a glow discharge process to rapidly and efficiently form a film of hydrogenated amorphous silicon on a substrate. An inductively coupled RF glow discharge apparatus, a capacitively coupled glow discharge apparatus or a DC glow discharge apparatus may be employed to deposit the amorphous silicon on a conducting or non-conducting substrate. The disilane or higher order silanes may also be combined in a glow discharge process with gases which contain elements such as nitrogen or oxygen to rapidly deposit corresponding compound films.

Growing community of inventors

Mount Kisco, NY, United States of America

Marc H Brodsky