Space Exploration Technologies Corp.

Sgs-thomson Microelectronics S.a.

Stmicroelectronics (grenoble 2) Sas

Stmicroelectronics (alps) Sas

Marc Gens

David Francois Jacquet

Pascal Triaire

Paul Lee Pearson

Masoud Kahrizi

Robert Baummer, Jr

Jean-Noel Rozec

Fabrice Jean André Belvèze

Francois Lucien Emile Icher

François Van Zanten

Jean Jimenez

Elias El Haddad

Francedillaois Van Zanten

Fabien Pousset

In an embodiment, an apparatus includes a first baseband section to receive a calibration signal; a first radio frequency (RF) section configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal. The apparatus includes a second RF section to receive the RF calibration signal and generate a received calibration signal based on demodulating the RF calibration signal; a calibration section; a first antenna electrically coupled to the first RF section and configured to transmit the RF calibration signal; and a second antenna electrically coupled to the second RF section and configured to receive the RF calibration signal. The calibration section is configured to determine one or more of gain, baseband delay, or RF delay to calibrate the first RF section; and the second antenna is switchable between receiving the RF calibration signal and transmitting an encoded data signal.

Over-the-air calibration of antenna system

In an embodiment, a communications system includes a first transmitter including a digital beamforming baseband section configured to receive an input signal to be transmitted, the input signal at a baseband frequency, and a modulation section electrically coupled to the digital beamforming baseband section and a first antenna of a phased array antenna. The modulation section is configured to receive a local oscillator signal at a first local oscillator frequency and apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal. The modulation section generates a modulated signal based on the input signal. The communication system includes a second transmitter included in a second IC chip of the plurality of IC chips electrically coupled to a second antenna and configured to provide a second modulated signal at the carrier frequency and a second LO leakage signal at a second local oscillator frequency.

Near zero intermediate frequency (NZIF) compensation of local oscillator leakage

In an embodiment, an apparatus includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on modulating the calibration signal. The calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, the receive section includes a second RF section and a calibration section, the second RF section is configured to generate a received calibration signal based on the RF calibration signal, the received calibration signal and a reference signal associated with the RF calibration signal comprise inputs to the calibration section and the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

In an embodiment, a communications system includes a transmitter including a digital beamforming baseband section including a digital mixer, the digital beamforming section configured to receive an input signal to be transmitted, the input signal at a baseband frequency; and a modulation section electrically coupled to the digital beamforming baseband section, the modulation section including an up converter configured to receive a local oscillator signal at a local oscillator frequency. The digital mixer is configured to apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal at a different frequency from the baseband frequency. The up converter is configured to up convert the baseband frequency shifted input signal based on the local oscillator signal to generate a modulated signal at a carrier frequency, wherein the local oscillator frequency is different from the carrier frequency.

In an embodiment, an apparatus included in a communications system includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on the calibration signal, and wherein the calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, wherein the receive section includes a second RF section and a calibration section, wherein the second RF section is configured to generate a received calibration signal based on the RF calibration signal, and wherein the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

The system comprising a slave module and a master module. The master module comprises a master control module (CONTRM). The slave module comprises a determination module (DETER). The determination module (DETER) is configured to determine a value of a physical quantity of the slave module. The determination module (DETER) is configured to receive, from the master control module (CONTRM), a command to start counting and a command to end counting. The determination module (DETER) is configured to determine a number of oscillations, between reception of the command to start counting and reception of the command to end counting, of an oscillating signal of which a frequency depends on the value of the physical quantity.

System comprising a slave module and a master module

The present invention relates to a voltage regulator including at least one input terminal for receiving a supply voltage; a circuit for generating a reference voltage proportional to a desired regulated output voltage; an amplifier of a signal of error between the reference voltage and the output voltage assigned with a coefficient of proportionality; a capacitor connected between an output terminal and the ground, further including means for supplying at least the circuit and the amplifier with the output voltage in case of a deficiency or a disappearing of the supply voltage present on the input terminal.

Voltage regulator with internal generation of a logic signal

The present invention relates to a voltage regulator, including at least two input terminals for receiving, each, an independent supply voltage, and including a means for automatically selecting the highest supply voltage from among the voltages present at the input terminals, and a means for insulating the supply terminal associated with the lowest voltage from the rest of the circuit, these means introducing a very low voltage drop between the input terminal at the highest voltage and an output terminal of the regulator.

Voltage regulator with automatic selection of a highest supply voltage

A circuit protects pads of an integrated circuit having a plurality of power supply sources against electrostatic overvoltages. Each power supply is connected between a high voltage pad and a low voltage pad. Each pad of the circuit, as well as each power supply pad, is connected to the anode of a first diode having its cathode connected to a first conductive bus, and to the cathode of a second diode having its anode connected to a second conductive bus. A unidirectional clipping device is connected by its cathode to the first bus and by its anode to the second bus.

Integrated circuit protected against electrostatic overvoltages

A predetermined frequency and adjustable level excitation circuit for a capacitive load (B) having a first terminal connected to a reference voltage (G). The circuit includes two switches (S1, S2) connected in series between a supply voltage (Vcc) and the reference voltage (G). The junction (S) of the two switches is coupled to the second terminal (A) of the load. The two switches are not simultaneously closed. A circuit (10) periodically controls the closing of the switch connected to the supply voltage. A regulation circuit (R2, R3, 12) acts on the control circuit to trigger opening of one of the switches when the voltage across the load reaches a predetermined value.

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Saint Martin d'Uriage, France

Marc Gens