Analog Devices,inc.

Raytheon Company

Mediatek Corporation

Marc E Goldfarb

Edmund J Balboni

Wyn T Palmer

Andrew Pye

Peter John Katzin

Manfred J Schindler

Rosamaria Croughwell

Aryeh Platzker

J Bradford Cole

Luke Steigerwald

Simon Gay

One embodiment is an apparatus comprising a semiconductor integrated circuit ('IC') chip comprising at least one active component for implementing an amplifier circuit; and a laminate structure comprising a plurality of metal layers, the laminate structure further comprising a plurality of passive components and transmission line-based structures. The semiconductor IC chip is integrated with the laminate structure such that a top layer of the laminate structure comprises a shield over a top of the semiconductor IC chip and the passive components for limiting electromagnetic coupling of signals generated by the amplifier circuit beyond the laminate structure.

High-performance variable gain amplifier employing laminate transmission line structures

In one example embodiment, a programmable filter is provided, including a plurality of variable-inductance networks and a plurality of variable-capacitance networks. The programmable filter may be implemented in a classical filter topology, with variable-capacitance networks replacing discrete capacitors and variable-inductance networks replacing discrete inductors. An example variable-inductance network comprises a primary inductor with an intermediate tap, and secondary inductor connected at the intermediate tap, with switches for selecting an inductance.

Programmable filter

Apparatus and methods of manufacture for a wideband RF mixer are provided. The RF mixer includes an input, an LO input, and an output. A variable impedance tuner is disposed in an input signal path between the input port and the RF mixer, and a variable impedance tuner is disposed in an output signal path between the output and the RF mixer. The impedances of the variable impedance tuners are controllable for a particular frequency of operation with one or more digital or analog control signals.

Apparatus and method for a wideband RF mixer

Apparatus and methods for electronic amplification are provided. In one embodiment, a method includes providing a first differential amplification block, providing a second differential amplification block, electrically connecting the first and second differential amplification blocks in a stack between a first voltage reference and a second voltage reference, amplifying a first signal using the first differential amplification block, and amplifying a second signal using the second differential amplification block. A voltage difference between the first and second voltage references defines a power supply voltage, and the first differential amplification block operates over a first range of the power supply voltage and the second differential amplification block operates over a second range of the power supply voltage.

Apparatus and methods for electronic amplification

Methods and apparatus for amplifying signals over a wide frequency range to generate high voltage outputs feature a pair of switching modules which are connected in series. Switching modules, e.g., field-effect transistors (FETs), operate based on the voltage difference between an amplified signal and a fixed DC signal at two of their terminals, thereby generating an output waveform that has peak-to-peak voltage higher than, e.g. twice, the breakdown voltage of the transistors within the amplifier. The DC signals applied at the switching modules may be varied using an AC signal to improve the risetime of the output waveform and achieve a faster operational speed of the amplifier.

High voltage amplification using low breakdown voltage devices

A device for amplifying signals over a wide frequency range features stacked amplifying modules connected between a DC voltage source and an electrical ground. The stacking configuration reuses the DC current produced the voltage source, and thus reduces the amount of operational DC current permitting the use of lower voltage, higher frequency devices to be used. The amplifying modules are fed signals which are different versions of an input signal, and the output signals are AC coupled using capacitors to balance out gain imbalances and asymmetries between the amplifying modules.

Wideband RF amplifiers

Varactor and reference oscillator structures are provided that are particularly suited for integrated circuit fabrication and which provide excellent parameter performance (e.g., monotonicity, linearity, low phase noise and low differential and integral non-linearity) so that they are useful in a variety of wireless communication structures (e.g., cellular telephones).

Digitally-controlled reference oscillators

Reference signal generators are provided that automatically adjusts a reference signal's amplitude when that signal is delivered into system loads having unknown capacitances. The amplitude is preferably initiated at a maximum amplitude to insure operation of system elements that require the reference signal. It is subsequently adjusted downward to a controlled reference amplitude which is predetermined to be an amplitude sufficient to sustain proper operation of the system elements but sufficiently reduced to minimize the spurious signals typically generated by fast high-level current transitions. In addition, the reduction to the controlled amplitude reduces the system current drain. The level control is realized in a buffer amplifier so that the amplitude level of an oscillator signal can be set independently to maximize its signal-to-noise performance. Accordingly, requirements for the reference amplitude do not compromise requirements for the amplitude level of the oscillator signal.

Reference signal generators

A variable gain amplifier has at least two branches connected in parallel to drive a common output load. Each branch includes at least two FETs in a cascode configuration. A first FET in each branch is arranged to receive an input signal and to amplify the signal in a common source configuration; the second FET is arranged in a common gate configuration with its source receiving the output current of the first FET. The gate of the second FET is coupled to a corresponding gain control input so that the second FET is enabled when the gate receives an enabling gain control signal and disabled otherwise. Preferably the first and second FETs in each branch are biased in a saturation region of operation when the second FET is enabled by the gain control input. This maintains a low distortion figure throughout the dynamic range of the gain control. Preferably, the invention also includes an active fixed gain power amplification stage for coupling the output to a power amplifier.

Stepped gain controlled RF driver amplifier in CMOS

A direct conversion receiver having a homodyning section fed by a received radio frequency signal having a carrier frequency and reference signal having the carrier frequency; and a filter coupled to the monodyning section. The filter includes a plurality of serially coupled high pass filter stages. The high pass filter section acts as a DC offset correction loop that eliminates the serial effect of many amplifier sections on DC offsets arising within components, while maintaining a sufficiently low cutoff frequency to avoid adversely impacting information integrity at higher frequencies. The high pass filter sections also enable the integration of the needed capacitors, thus minimizing external components and connections. Each filter stage includes an amplifier and a low pass filter coupled in a negative feedback arrangement with the amplifier. Each low pass filter is adapted to have the cutoff frequency thereof switch from an initial high cutoff frequency to a subsequent lower cutoff frequency. A high filter stage of a direct conversion receiver is provided that includes in a low pass filter feedback section thereof a capacitor and a resistor section coupled to the capacitor. The section includes a switch for changing the resistance of the resistance section. The resistance has a first resistance value during an initial phase and a second resistance value during a subsequent phase. A switching arrangement charges the capacitor rapidly during an initial, start-up time period or after a large step change in the gain of the amplifier.

Direct conversion receivers and filters adapted for use therein

A filter having a semiconductor chip and a low pass filter section on the chip. The low pass filter section includes a filter transconductor and a filter capacitor connected to the filter capacitor. The low pass filter section has a cut-off frequency related to the transconductance, gm,, of the filter transconductor and the capacitance of the filter capacitor. A gm control circuit having a control circuit transconductor is provided. The gm control circuit includes a first oscillator for producing a reference frequency. The first oscillator has a portion thereof on the chip and an off-chip capacitor and off-chip resistor. The reference frequency is a function of the capacitance of the off-chip capacitor and the resistance of the off-chip resistor. A second oscillator is on the chip and produces a variable frequency. The second oscillator has an on-chip capacitor. The variable frequency is a function of the capacitance of the on-chip capacitor and on-chip transconductor, gm,, such variable frequency is controlled by a control circuit transconductor control signal. A control loop is provided. The control loop is responsive to a difference between the reference frequency and the variable frequency and such loop produces the a feedback signal to drive the variable frequency towards the reference frequency.

Filter having minimized cut-off frequency variations

A distributed circuit includes a plurality of pairs of cascode coupled first and second transistors with each transistor having base, emitter, and collector electrodes. The first transistor of each pair is disposed to have a first one of emitter and collector electrodes coupled to a reference potential and the second one of said transistors of each pair is disposed to have the base electrode coupled to a reference potential with the second one the collector and emitter electrodes of the first transistor of each pair being coupled to the emitter electrode of the corresponding second transistor of each pair. The network further includes an input propagation network disposed to successively couple the base electrode of each one of the first transistors of each pair of transistors to an input terminal and an output propagation network disposed to couple the collector electrodes of each one of the second transistors of each one of the pair of transistors to an output terminal of the circuit.

Broadband bipolar transistor distributed amplifier

A phase shifter network which alternates between structurally dual networks is provided. In particular, the phase shifter has a topography which permits the network to be configured as alternatively T or .pi. networks of low pass and high pass delay circuits in accordance with states of a single control signal fed to the phase shifter.

Simplified phase shifter circuit

A power divider circuit having an input port and three output ports is described. The circuit includes a first power divider stage having an input port which corresponds to the input of the power divider circuit and a pair of output ports with a first resistor coupled between the pair of output ports of the first stage. The power divider further includes first and second pairs of transmission lines with first ones of said lines of each pair having a first characteristic impedance and second ones of said lines having a second, different characteristic impedance generally equal to half of the characteristic impedance of the first ones of said lines. First ends of each one of the transmission lines of each pair are coupled to a corresponding port of the first power combined stage. Second ends of each of said lines or each pairs are coupled by second and third resistors. Second ends of the second transmission lines of each one of said first and second pairs of transmission lines are also connected together providing the one of the output ports of the power combiner circuit with the other two output ports of the power combiner circuit being provided at second ends of the first transmission lines in each one of said first and second pairs of transmission lines.

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Atkinson, NH, United States of America

Marc E Goldfarb