Imec

Katholieke Universiteit Leuven, Ku Leuven R&d

Interuniversitair Microelektronica Centrum (imec)

Interuniversitair Micorelektronica Centrum (imec, Vzw)

Imec Vzw

Marc Demand

Vasile Paraschiv

Denis Shamiryan

Nadine Collaert

Paul A Zimmerman

Werner Boullart

Adelina K Shickova

A new, effective and cost-efficient method of introducing Fluorine into Hf-based dielectric gate stacks of planar or multi-gate devices (MuGFET), resulting in a significant improvement in both Negative and Positive Bias Temperature Instabilities (NBTI and PBTI) is provided. The new method uses an SFbased metal gate etch chemistry for the introduction of Fluorine, which after a thermal budget within the standard process flow, results in excellent F passivation of the interfaces. A key advantage of the method is that it uses the metal gate etch for F introduction, requiring no extra implantations or treatments. In addition to the significant BTI improvement with the novel method, a better Vcontrol and increased drive current on MuGFET devices is achieved.

Use of F-based gate etch to passivate the high-k/metal gate stack for deep submicron transistor technologies

A method for the selective removal of a high-k layer such as HfOover silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BClplasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BClcomprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl/Nplasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero. The Boron-Nitrogen (BxNy) comprising film can be removed during the etching process using the right substrate bias (leading to ion bombardment) or after the etching process by a simple water rinse since the Boron-Nitrogen (BxNy) comprising film is water soluble.

Plasma composition for selective high-k etch

A method is disclosed for the selective removal of rare earth based high-k materials such as rare earth scandate high-k materials (e.g. DyScO) over silicon or silicon dioxide. As an example Dy and Sc comprising high-k materials are used as a high-k material in gate stacks of a semiconductor device. The selective removal and etch of this high-k material is very difficult since Dy and Sc (and their oxides) are difficult to etch. The etching could however be easily stopped on them. For patterning of the metal gates comprising TiN and TaN on top of rare earth based high-k layer a chlorine-containing gases (Cland BCl) can be used since titanium ant tantalum chlorides are volatile and reasonable selectivity to other material present on the wafer (Si, SiO) can be obtained. The Dy and Sc chlorides are not volatile, but they are water soluble. This behavior makes it possible that the surface layer of Dy and Sc comprising high-k materials gets chlorinated (brominated) during exposure to the Cl or Br comprising plasma and can be removed after etch by a water rinse.

Selective removal of rare earth based high-k materials in a semiconductor device

A method is provided for the patterning of a stack comprising elements that do not form volatile compounds during conventional reactive ion etching. More specifically the element(s) are Lanthanide elements such as Ytterbium (Yb) and the patterning preferably relates to the dry etching of silicon and/or germanium comprising structures (e.g. gates) doped with a Lanthanide e.g. Ytterbium (Yb doped gates). In case the silicon and/or germanium comprising structure is a gate electrode the silicon and/or germanium is doped with a Lanthanide (e.g. Yb) for modeling the work function of a gate electrode.

Patterning of doped poly-silicon gates

Growing community of inventors

Saint-Jean-Geest, Belgium

Marc Demand