Boe Technology Group Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Hefei Boe Display Technology Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Maoxiu Zhou

Haipeng Yang

Ke Dai

Lei Guo

Min Cheng

Chunxu Zhang

Xiaoting Jiang

Yanping Liao

Yuntian Zhang

Peng Hui Jiang

Zhihua Sun

Yingmeng Miao

Zhangtao Wang

Xibin Shao

Jiantao Liu

Qi Liu

Li Tian

Yong Jun Yoon

Zhou Rui

Mengmeng Li

Xiaoye Ma

Yongjun Yoon

Lin Chen

Xipeng Wang

Jiaqing Liu

Dengfeng Wang

A driving module includes N driving circuits connected in series; the driving circuit includes an input terminal; N is a positive integer; input terminals of first a stages of driving circuits included in the driving module are electrically connected to an initial voltage line; a is a positive integer; an input terminal of an nth stage of driving circuit included in the driving module is electrically connected to an output terminal of an (n−m)th stage of driving circuit included in the driving module through an input cascade line; n and m are positive integers, and m is less than n; the driving module further includes at least one connection line, there is an overlapping portion between an orthographic projection of the connection line on the base substrate and an orthographic projection of the initial voltage line on the base substrate.

Display substrate, repair method and display device

The present disclosure provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate includes a plurality of gate lines () and a plurality of data lines () disposed on a base substrate (), the plurality of gate lines () extend along a first direction, the plurality of data lines () extend in a second direction, the plurality of gate lines () and the plurality of data lines () are intersected to define a plurality of sub-pixels, the sub-pixel includes a thin film transistor (), a pixel electrode () and a common electrode (), the common electrode () in one sub-pixel is connected with the common electrode () in the adjacent sub-pixel through a common connection portion ().

Array substrate and manufacturing method thereof, and display apparatus

A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Display panel and display device with non-display area gate lines to match display area gate lines RC load

An array substrate and a display panel are described. The array substrate may include a first base; a plurality of pixel units arrayed on the first base in a row direction and a column direction; each of the pixel units comprising at least two sub-pixels arranged in the row direction; a plurality of first scanning lines sequentially arranged on the first base in the column direction, at least one first scanning line being arranged at a side of each row of pixel units in the column direction, the first scanning lines being connected with the sub-pixels; and a plurality of second scanning lines sequentially arranged on the first base in the row direction, at least one second scanning line being arranged at a side of each column of pixel units in the row direction.

Array substrate and display panel

The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L, and the first length Lis not equal to the second length L

Display substrate and display device

An Embodiment of the present disclosure provide a display substrate, including a base substrate, and a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a plurality of common electrodes and a plurality of pixel electrodes on the base substrate. The second scanning lines are parallel to the data lines, and the second scanning lines, the common electrodes and the pixel electrodes are in different layers. The common electrodes are located on a side of the second scanning lines and the data lines away from the base substrate, and on a side of the pixel electrodes proximal to the base substrate. An orthographic projection of one of the data line and the second scanning line on the base substrate is located in a spacer region between adjacent pixel electrodes.

Display substrate and display panel for reducing crosstalk

An array substrate includes a base substrate, pixel electrodes and common electrodes, first scan lines, second scan lines and data lines. The pixel electrode has first electrode strips disposed at intervals in a row direction. The common electrodes and the pixel electrodes are disposed on the same layer, and the common electrodes have second electrode strips disposed at intervals. The second electrode strips and the first electrode strips are alternatively arranged. The first scan line is located between two adjacent rows of pixel electrodes. The second scan line is located between two adjacent columns of pixel electrodes and is electrically connected to the first scan line, and the second scan line has a scan signal input terminal. The data line has a data signal input terminal. An orthographic projection of the data line on the base substrate intersects with a central region of the pixel electrode on the base substrate.

The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q−1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M≥Q>1, 1≤q≤Q, and M, N, Q, q are all positive integers.

Display panel and electronic device

Provided is an array substrate. The array substrate includes at least one pad group disposed in a peripheral region of a base substrate, wherein the at least one pad group includes a sector pad group in which the pads are distributed in a sector shape. Therefore, the bonding yield between the array substrate and the circuit board is increased.

Array substrate, display panel and display device

Disclose are a display substrate, a liquid crystal display panel and a display device. The display substrate is provided with a display region. The display substrate includes: a base substrate, and a black matrix arranged on a side of the base substrate. The black matrix includes: a first region corresponding to the display region, and a plurality of frame regions arranged on a periphery of the first region. At least one rectilinear first slit and at least one rectilinear second slit intersecting with the at least one rectilinear first slit are arranged in the at least one of the frame regions, and an extending direction of the at least one rectilinear first slit is same as an extending direction of the at least one of the frame regions.

Display substrate, liquid crystal display panel, and display device

A mask is provided in embodiments of the disclosure, at least including: a first light transmission area provided with a first optical filter film; and a second light transmission area provided with a second optical filter film; the first optical filter film and the second optical filter film comprise respective materials through which light of different frequency ranges is optically filtered, respectively. A method for manufacturing a mask, a lithography method, a display panel, a display device, and an exposure device are further provided in embodiments of the disclosure.

Mask and method for manufacturing the same, lithography method, display panel, display device and exposure device

The present disclosure provides a pixel driving circuit, a driving method, a pixel unit, and a display apparatus. The pixel driving circuit includes a driving transistor, a charging/discharging circuitry, a light-emitting control circuitry, a data write-in control circuitry, and a charging/discharging control circuitry, where a first electrode of the charging/discharging circuitry is connected to a second electrode of the driving transistor, and the charging/discharging control circuitry is configured to enable a first electrode of the driving transistor to be electrically connected to a second level output terminal under the control of a data line, and enable a second terminal of the charging/discharging circuitry to be electrically connected to a gate electrode of the driving transistor under the control of a first scan line.

Pixel driving circuit, driving method, pixel unit, and display apparatus

A shift register, a gate driver, a display panel and a driving method are provided. The shift register includes an input-reset circuit, which is connected with a pull-up node; and a driving circuit, which is connected with the pull-up node. The input-reset circuit is configured to: write a voltage of a first signal into the pull-up node in response to a second signal, in an input phase of forward scanning; write a voltage of a fourth signal into the pull-up node in response to a third signal, in a reset phase of forward scanning; write the voltage of the fourth signal into the pull-up node in response to the third signal, in an input phase of reverse scanning; and write the voltage of the first signal into the pull-up node in response to the second signal, in a reset phase of reverse scanning.

Shift register, gate driver, display panel and driving method

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a plurality of mutually parallel signal lines, an insulating layer located on a layer in which the plurality of signal lines is located and at least one first conductive structure located on the insulating layer. The insulating layer includes at least two first through holes corresponding to the first conductive structure, and the first conductive structure is electrically connected with the signal lines through the at least two first through holes.

Growing community of inventors

Beijing, China

Maoxiu Zhou