Industrial Technology Research Institute

Mao-Yin Wang

Wei-Chin Huang

Juin-Ming Lu

Sheng-Po Wang

Hui-Hsin Lu

Kuan-Hung Chou

Louis Lu-Chen Hsu

Yu-Hsuan Liao

Ching-Kai Peng

A conversion method for reducing power consumption and computing apparatus using the same are introduced. The computing apparatus includes a conversion unit, a data storage unit and an instruction processing unit. The conversion unit receives a first instruction sequence. In a power saving mode, the conversion unit combines a second instruction sequence having the same function as the first instruction sequence with at least one specific instruction to obtain and output a third instruction sequence. The at least one specific instruction does not belong to an instruction set each instruction included in the first instruction sequence belongs to. The data storage unit includes a volatile part and a non-volatile part. The instruction processing unit is coupled to the conversion unit and the data storage unit, processes the third instruction sequence and manages a storage state of the data storage unit according to the at least one specific instruction.

Conversion method for reducing power consumption and computing apparatus using the same

A portable analytical device including at least one optical unit and optionally an adapting device are provided. The optical unit includes a light beam receiving area, a sample holder, a light beam exiting area, and a lens component. The adapting device holds the optical unit and an external hand-held computing device (EHCD), such that the optical unit is coupled to the EHCD.

Portable analytical device and system

A memory controlling device and method are disclosed for controlling a memory having a partial array self refresh (PASR) function and a plurality of memory segments. The memory controlling device comprises an address mapper, an address decoder, an address selector, and a PASR configuration register storing a PASR configuration. The address mapper converts an input address set into a mapped address set according to an address offset. The mapped address set comprises a plurality of consecutive mapped addresses or at least one mapped address within a limited range. The address decoder updates the PASR configuration during writing. The address selector generates an updated address set, which is used for setting at least one mode register of the memory, according to the PASR configuration register under a sleep-or-standby mode in order that the memory can self refresh at least one of the memory segments correspondingly.

Memory controlling device and method thereof for controlling memory with partial array self refresh (PASR) function

Growing community of inventors

Taipei, Taiwan

Mao-Yin Wang