Delphi Technologies, Inc.

Delco Electronics Corporation

Uchicago Argonne, LLC

Aptiv Technologies Limited

Delphi Technologies IP Limited

Manuel Ray Fairchild

Carl William Berlin

Ralph S Taylor

Bruce Alan Myers

Dwadasi Hare Rama Sarma

Celine Wk Wong

Rhonda Jean Heytens

Daniel Keith Ward

Scott David Brandenburg

Uthamalingam Balachandran

David Wayne Zimmerman

Suresh K Chengalva

Beihai Ma

David W Ihms

Tae H Lee

Kenneth David Mowery

Thomas D Cook

Paul R Martindale

Uthamalingam Balachjandran

Jeffrey R Scott

An electrical-circuit assembly includes an electrical-device and a heat-sink. The heat-sink has a base having a first-surface and a second-surface. The first-surface is in thermal communication with the electrical-device. The heat sink also has a lid having a third-surface and a fourth-surface. The third-surface faces toward the second-surface. The heat sink also has side-walls disposed between the base and the lid extending from the second-surface to the third-surface. The base, the lid, and the side-walls define a cavity. The heat sink also has a porous-structure extending from the second-surface toward the third-surface terminating a portion of the distance between the second-surface and the third-surface thereby defining a void between the porous-structure and the third-surface. The base, the side-walls, and the porous-structure are integrally formed of a common material. The porous-structure is characterized as having a contiguous-porosity network. The heat sink also has a heat-transfer-fluid disposed within the cavity.

Electrical-circuit assembly with heat-sink

A ceramic-wound-capacitor includes a first-electrically-conductive-layer, a dielectric-layer, a second-electrically-conductive-layer, and a protective-coating. The dielectric-layer is formed of lead-lanthanum-zirconium-titanate (PLZT). The protective-coating has a thickness of less than ten micrometers (10 &#x3bc;m) and provides electrical isolation between the first-electrically-conductive-layer and the second-electrically-conductive-layer of the ceramic-wound-capacitor. A method for fabricating the ceramic-wound-capacitor includes the steps of feeding a carrier-strip, depositing a sacrificial layer, depositing a first-electrically-conductive-layer, depositing a dielectric-layer, and depositing a second-electrically-conductive-layer to form an arrangement coupled to the carrier-strip by the sacrificial-layer, separating the arrangement from the carrier-strip and sacrificial-layer, creating an exposed-surface of the first-electrically-conductive-layer, applying a protective-coating to the exposed-surface of the first-electrically-conductive-layer, winding the arrangement with the protective-coating to form a ceramic-wound-capacitor, where the protective-coating is in direct contact with the first-electrically-conductive-layer and the second-electrically-conductive-layer of the ceramic-wound-capacitor.

Ceramic-wound-capacitor with lead lanthanum zirconium titanate dielectric

A ceramic-capacitor includes a first electrically-conductive-layer, a second electrically-conductive-layer arranged proximate to the first electrically-conductive-layer, and a dielectric-layer interposed between the first electrically-conductive-layer and the second electrically-conductive-layer. The dielectric-layer is formed of a lead-lanthanum-zirconium-titanate material (PLZT), wherein the PLZT is characterized by a dielectric-constant greater than 125, when measured at 25 degrees Celsius and zero Volts bias, and an excitation frequency of ten-thousand Hertz (10 kHz). A method for increasing a dielectric constant of the lead-lanthanum-zirconium-titanate material (PLZT) includes the steps of depositing PLZT to form a dielectric-layer of a ceramic-capacitor, and heating the ceramic-capacitor to a temperature not greater than 300&#xb0; C.

PLZT capacitor and method to increase the dielectric constant

A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

PLZT capacitor on glass substrate

A circuit board assembly that makes use of a low-temperature co-fired ceramic (LTCC) substrate, and a process for producing the assembly. The substrate contains at least first and second regions formed by a plurality of first ceramic layers and at least one second ceramic layer, respectively, that are superimposed and bonded to each other. Conductor lines are present on at least some of the first ceramic layers so as to be between adjacent pairs of the layers. Electrically-conductive vias electrically interconnect the conductor lines on different first ceramic layers, and a surface-mount IC device is mounted to the substrate. The first ceramic layers are formed of electrically-nonconductive materials, while the one or more second ceramic layers contain thermally-conductive particles dispersed in a matrix of electrically-nonconductive materials, such that the one or more second ceramic layers are more thermally conductive than the first ceramic layers.

Process of forming a laminate ceramic circuit board

A circuit board assembly having a laminate construction of multiple layers, such as a LTCC ceramic substrate, with conductor lines between adjacent pairs of layers. A heat sink is bonded to a first surface of the substrate, and a cavity is defined by and between the heat sink and the substrate such that a base wall of the cavity is defined by one of the layers with conductor lines thereof being present on the base wall. A surface-mount circuit device is received within the cavity, mounted to the base wall, and electrically connected to the conductor lines on the base wall. The device is received within the cavity such that a surface of the device contacts a surface region of the heat sink. The surface of the device is bonded to the surface region of the heat sink to provide a substantially direct thermal path from the device to the heat sink.

Thermal management of surface-mount circuit devices

A circuit board assembly that makes use of a low-temperature co-fired ceramic (LTCC) substrate, and a process for producing the assembly. The substrate contains at least first and second regions formed by a plurality of first ceramic layers and at least one second ceramic layer, respectively, that are superimposed and bonded to each other. Conductor lines are present on at least some of the first ceramic layers so as to be between adjacent pairs of the layers. Electrically-conductive vias electrically interconnect the conductor lines on different first ceramic layers, and a surface-mount IC device is mounted to the substrate. The first ceramic layers are formed of electrically-nonconductive materials, while the one or more second ceramic layers contain thermally-conductive particles dispersed in a matrix of electrically-non-conductive materials, such that the one or more second ceramic layers are more thermally conductive than the first ceramic layers.

Laminate ceramic circuit board and process therefor

An engine knock control system that can be digitally reconfigured to operate in different knock signal processing modes. The system includes a knock detection circuit that processes an incoming knock signal produced by a vibration or pressure sensor on the engine. The circuit includes a plurality of circuit devices that are capable of being interconnected in different circuit topology configurations to thereby process the knock signal in a selected one of a plurality of different modes. The circuit includes hardware and software for forming a selected interconnection configuration of the circuit devices in response to a coded data signal input to the circuit.

Digitally reconfigurable engine knock detecting system

A power MOSFET switching control for multiple loads requiring current limiting at initial energization comprises at least two MOSFETs connected in series between one of the multiple loads and a power supply. Each MOSFET has a control electrode with a control electrode capacitance. Each control electrode is connected to a single charge pump, powered by the power supply, repeatedly in a pulsed manner to limit average current through its MOSFET. The individual control electrodes are connected to the charge pump alternately in a predetermined order such that no two control electrodes are connected to the charge pump simultaneously. In one mode of operation, the control electrodes and charge pump are connected and disconnected by clocked, multiplexing switch control means at predetermined times. In another mode of operation, only the connections are accomplished at the predetermined times; and the disconnections are in response to control electrode voltage sensing means. In this last mode of operation, each control electrode may include discharge means activatable by the clocked, multiplexing switch control at predetermined times after the disconnection from the charge pump.

Growing community of inventors

Kokomo, IN, United States of America

Manuel Ray Fairchild