Motorola Corporation

Motorola Solutions, Inc.

Zebra Technologies Corporation

Manuel P Gabato

Paul H Gailus

Joseph A Charaska

John Janos Bozeki

Mark A Gannon

Thomas William Judd

Robert E Stengel

Steven C Jasper

Armando J Gonzalez

Gregory W Cox

Jeffrey B Wilhite

Kevin J McCallum

Vadim Dubov

Robert F Lay

Douglas M Hamilton

Jeffrey B White

A label modification unit may receive a label modification input associated with an image. The label modification unit may process, using an image filtering, the label modification input to convert the image to a bitmap for raster printing the image via a laser printhead. The label modification unit may determine, based on the bitmap, an array of power factors for a light beam that is configured to be emitted by a laser of the laser printhead and raster print the image. The label modification unit may control the laser of the laser printhead in association with raster printing the image on a rewriteable label according to the array of power factors.

Laser printhead raster path configuration for modifying a rewriteable label

A label modification unit may receive a label modification input associated with an image. The label modification unit may obtain a bitmap associated with a modification to the rewriteable label. The label modification unit may determine, based on the bitmap and using a heat dissipation model, temperature profiles for a plurality of raster print paths of the laser. The label modification unit may select, based on the temperature profiles and from the plurality of raster print paths, a raster print path for the modification. The label modification unit may control at least one of the laser, the optic, and the reflector system to: cause the light beam to follow the raster print path, and emit the light beam according to an array of power factors that are associated with the raster print path.

A feedback loop with an adjustable closed loop frequency response. The feedback loop contains adjustable pole () and adjustable zero elements () for changing the pole and/or zero locations in the feedback loop's loop frequency response thereby changing the closed loop frequency response of the feedback loop. In one embodiment, the feedback loop is a Cartesian feedback loop suitable for use in a radio transmitter.

Feedback loop with adjustable bandwidth

A frequency synthesizer includes: a frequency source generating a reference signal that includes a plurality of pulses having periodicity based on a reference frequency; a feedback loop that includes, a phase detector circuit, a loop filter, a controlled oscillator that generates an output signal at an output, and a loop divide circuit; a non-linear circuit element at an input of the phase detector circuit, which generates intermodulation distortion that causes at least one spurious signal at the output; and a controller controlling the loop divide circuit and the non-linear circuit element. The frequency synthesizer further includes a dither circuit that adjusts the timing of some of the pulses of the reference signal based on a parameter provided by the controller to the non-linear circuit element, thereby, providing a jittered reference signal to the non-linear circuit element for attenuating the at least one spurious signal at the output.

Method and apparatus for spur reduction in a frequency synthesizer

A method and apparatus for reducing in-band spurs in a fractional-N synthesizer () includes generating a compensated current signal by a charge pump () coupled to a phase detector (). The compensated current signal includes in-band spurs having frequencies within a frequency bandwidth associated with a loop filter (). The method then includes selectively dithering the compensated current signal with a sufficient dither level to spread the frequencies of in-band spurs beyond the frequency bandwidth associated with the loop filter (). The dithered compensated current signal is then passed through the loop filter () for filtering the in-band spurs having frequencies beyond the frequency bandwidth. The method then includes generating a voltage controlled oscillator (VCO) signal with reduced in-band spurs proportional to the filtered compensated current signal.

Method and apparatus for reducing spurs in a fractional-N synthesizer

A DPC () that includes: a frequency source (); a delay-locked loop () for receiving a clock signal and generating a plurality of phase-shifted clock signals; a control device () having a DPS () and a DAC () for receiving an input signal identifying a desired frequency for a synthesized signal; a selection circuit () for receiving the plurality of phase-shifted clock signals, selecting a sequence of the phase-shifted clock signals and outputting a coarse synthesized signal; a variable delay cell () having a first input coupled to the selection circuit to receive the coarse synthesized signal and a second input coupled to the control device for receiving a fine tune adjustment signal to modify the coarse synthesized signal to generate the synthesized signal () having substantially the desired frequency. The DPC further includes training apparatus for calibrating the DPC.

Method and apparatus for frequency synthesis

A delay-locked loopthat includes: an adjustable frequency source () for generating a clock signal () having an adjustable frequency; an adjustment and tap selection controller () for determining a first frequency as a function of a second frequency and for causing the frequency source to adjust the frequency of the clock signal to substantially the first frequency, the second frequency being the desired frequency of a first output signal; a delay line () configured to receive the clock signal for generating a plurality of phase-shifted clock signals; and a first selection circuit () for receiving the plurality of phase-shifted clock signals and for selecting, one at a time and under the control of the adjustment and tap selection controller, a first sequence of the phase-shifted clock signals for generating the first output signal having substantially the second frequency.

Adjustable frequency delay-locked loop

EMI spur interference is reduced in a system where the desired signal has periodically repeating components without destructively interfering with the repeating components. The frequency of the spur interference is determined (203) and fed to a notch filter (201) so as to center the notch at the frequency of the spur interference. Determination of the frequency is scheduled (601) to avoid cancellation of desired periodically repeating components of the signal.

Method and apparatus for scheduling adaptation for a notch filter

Received signal strength calculations in a radio are carried out by hardware which scales the absolute value of components of the received signal in a linear fashion by using two scaling factors.

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Elmhurst, IL, United States of America

Manuel P Gabato