Micron Technology Incorporated

Intel Corporation

Micro Technology, Inc.

Manoj Sinha

Glen Earl Hush

Sujeet V Ayyapureddi

Brandon Roth

Ram K Krishnamurthy

Atila Alvandpour

Sugato Mukherjee

Binta M Patel

Gian Gerosa

Amrish Kontu

There is provided a system and method for automatically calibrating a temperature sensor. More specifically, there is provided a system including a temperature sensor that includes a first resistance configured to indicate a temperature of the temperature sensor and a second resistance, in series with the first resistor, wherein the second resistance is adjustable to calibrate the first resistance, and a calibration circuit, coupled to the temperature sensor and configured to automatically calibrate the first resistance.

System and method for automatically calibrating a temperature sensor

There is provided a system and method for automatically calibrating a temperature sensor. More specifically, there is provided a system made up of a temperature sensor which includes a first resistance configured to indicate a temperature of the temperature sensor and a second resistance, in series with the first resistor, wherein the second resistance is adjustable to calibrate the first resistance, and a calibration circuit, coupled to the temperature sensor and configured to automatically calibrate the first resistance.

A delay circuit provides a voltage and temperature compensated delayed output signal. The delay circuit includes a first delay stage that receives an input signal, and generates a delayed output signal from the input signal. The delay circuit also includes a second delay stage that receives the delayed output signal of the first delay stage, and generates a delayed output signal from the output of the first delay stage. The first delay stage and the second delay stage are coupled a voltage supply. The magnitude of the delay of the second delayed signal is inversely proportional to the magnitude of the supply voltage to substantially the same degree that the delayed output signal of the first delay stage is proportional to the magnitude of the supply voltage.

Voltage and temperature compensation delay system and method

A system may include detection of a low signal received from a transmission line, and uncoupling of a termination circuit from the transmission line in response to the detected low signal. In some aspects, a transition of a strobe signal is then detected, and the termination circuit is coupled to the transmission line in response to the detected transition.

Dynamic transmission line termination

A method and apparatus are provided for controlling refresh operations of a dynamic memory device. The temperature of the dynamic memory device is detected. The detected temperature is then used to adjust a refresh rate of the dynamic memory device to compensate for increased leakage at higher temperatures and more closely tailor the timing of the refresh operations to the conditions of the dynamic memory device.

Method and apparatus for controlling refresh operations in a dynamic memory device

A temperature sensor is comprised of a device adapted to provide a first signal having a parameter responsive to temperature. A generator provides a reference signal having a parameter that is substantially consistent over a preselected temperature range. A comparator is electrically coupled to the device and the generator and is adapted to provide a second signal in response to the parameter of the first signal differing from the parameter of the reference signal. A digital filter is coupled to the comparator and is adapted to provide a third signal in response to receiving the second signal for a preselected duration of time.

Temperature sensor

A high-performance, low energy amplifier circuit for the detection and amplification of a voltage differential includes a current conveyor and a sense amplifier. The current conveyor includes a pair of cross-linked transistors and a pair of pass transistors. The sense amplifier includes four transistors forming a cross-linked current sense amplifier. The current sense amplifier detects a current differential between complementary bit lines, develops a differential voltage based on the current differential, amplifies the differential voltage and outputs the amplified differential voltage.

Differential current sense amplifier

A sense amplifier for reading memory cells in a SRAM, the sense amplifier comprising two gate-biased pMOSFETs, each corresponding to a selected bitline. The gates of the two gate-biased pMOSFETs have their gates biased to a bias voltage, their sources coupled to the selected bitlines via column-select transistors, and their drains coupled via pass transistors to the two ports of two cross-coupled inverters, the cross-coupled inverters forming a latch. After a selected bitline pair has been pre-charged and the pre-charge phase ends, one of the two gate-biased pMOSFETs quickly goes into its subthreshold region as one of the bitlines discharges through its corresponding memory cell, thereby cutting off the bitline's capacitance from the sense amplifier. When the pass transistors are enabled, the other of the two pMOSFETs allows a significant bitline charge to transfer via its corresponding pass transistor to its corresponding port, whereas a relatively much smaller charge is transferred to the other port. This charge transfer scheme allows a differential voltage to quickly develop at the ports, thereby providing a fast latch and read operation with reduced power consumption. Bitline voltage swing may also be reduced to reduce power consumption.

Growing community of inventors

Boise, ID, United States of America

Manoj Sinha