Stmicroelectronics S.r.l.

Manlio Sergio Creda

Paolo Caprara

Claudio Brambilla

Valerio Cassio

A method of manufacturing a semiconductor virtual ground memory device having a matrix of floating gate memory cells formed on a semiconductor substrate with a plurality of continuous bit lines extending across the substrate as discrete parallel stripes. The device also includes a circuit portion for selection transistors and decode and address circuit portions having P-channel and N-channel MOS transistors. According to the method, N-wells are formed in at least one substrate portion to accommodate the P-channel transistors, active areas of all transistors are defined using a screening mask, and then an isolation layer is grown through the apertures of the screening mask. The screening mask is not open over the matrix region of the memory cells.

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Lomagna, Italy

Manlio Sergio Creda