Samsung Electronics Co., Ltd.

Mankeun Seo

Hong Rak Son

Junjin Kong

Jae Hun Jang

Eun Chu Oh

Hongrak Son

Pilsang Yoon

Kwanwoo Noh

Dohyeon Kim

Seonghoon Woo

Bohwan Jun

Jaehun Jang

Daewook Kim

KyoungLae Cho

Hanbyeul Na

Youngsuk Ra

Yong Ho Song

Soonjae Won

The present disclosure provides method and apparatuses for managing memory of storage system. In some embodiments, a controller of a storage system includes a memory storing a program, and a processor configured to execute the program to determine whether a type of data stored in the memory is at least one of a first data type and a second data type, store, in the memory, a header of the data stored in the memory, based on a first determination that the data stored in the memory is of the first data type, compress the data stored in the memory, based on a second determination that data stored in the memory is of the second data type, and power off the memory based on at least one of the header of the data and the compressed data having been stored in the memory.

Method and apparatus for managing memory of storage system

An Error correction code (ECC) decoder including an input manager configured to sequentially receive a first read data including a plurality of data units read from a plurality of sectors in a memory cell array of a nonvolatile memory device, by unit of sector, a pre-decoder configured to sequentially receive the first read data and generate a respective syndrome of each of the data units, and a main decoder configured to sequentially perform a first ECC decoding on the first read data based on the respective syndrome. The input manager includes a defective sector buffer to store a data unit having a minimum expected error count from among data units on which a first ECC decoding is failed. The main decoder performs a second ECC decoding on a defective data unit stored in the defective sector buffer and receives a second read data from a selected sector corresponding to the defective data unit.

Error correction code decoder, storage controller and storage device

A method of operating a storage controller includes receiving raw data indicating a series of bits each corresponding to one of threshold voltage states, performing a first state shaping for reducing a number of first target bits of the series of bits, logical values of the first target bits being equal to a logical value of a target threshold voltage state of the threshold voltage states in a first page of plural pages, generating first indicator data that indicates the first target bits based on the first state shaping, compressing the first indicator data, and storing the compressed first indicator data.

Storage controller compressing indicator data, storage device including the same, and method of operating the same

Example embodiments relate to a bad area managing method of a nonvolatile memory device. The nonvolatile memory device may include a plurality of memory blocks and each block may contain memory layers stacked on a substrate. According to example embodiments, a method includes accessing one of the memory blocks, judging whether the accessed memory block includes at least one memory layer containing a bad memory cell. If a bad memory cell is detected, the method may further include configuring the memory device to treat the at least one memory layer of the accessed memory block as a bad area.

Nonvolatile memory device and bad area managing method thereof

A memory controller comprises a host interface block comprising a compression ratio calculator configured to determine whether a compression ratio of input data exceeds a predetermined compression ratio, and a compression block configured to compress the input data as a consequence of the host compression ratio calculator determining that the compression ratio exceeds the predetermined compression ratio.

Data storage device with selective data compression

Growing community of inventors

Gyeonggi-do, South Korea

Mankeun Seo